SNOSDF5 September   2023 LM74700D-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
  8. 7 Typical Characteristics
  9. 8 Parameter Measurement Information
  10. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Input Voltage
      2. 9.3.2 Charge Pump
      3. 9.3.3 Gate Driver
      4. 9.3.4 Enable
    4. 9.4 Device Functional Modes
      1. 9.4.1 Shutdown Mode
      2. 9.4.2 Conduction Mode
        1. 9.4.2.1 Regulated Conduction Mode
        2. 9.4.2.2 Full Conduction Mode
        3. 9.4.2.3 Reverse Current Protection Mode
  11. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Design Considerations
        2. 10.2.2.2 MOSFET Selection
        3. 10.2.2.3 Charge Pump VCAP, Input and Output Capacitance
      3. 10.2.3 Selection of TVS Diodes for 12-V Battery Protection Applications
      4. 10.2.4 Selection of TVS Diodes and MOSFET for 24-V Battery Protection Applications
      5. 10.2.5 Application Curves
      6. 10.2.6 OR-ing Application Configuration
    3. 10.3 Power Supply Recommendations
    4. 10.4 Layout
      1. 10.4.1 Layout Guidelines
      2. 10.4.2 Layout Example
  12. 11Device and Documentation Support
    1. 11.1 Receiving Notification of Documentation Updates
    2. 11.2 Support Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  13. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

10.4.1 Layout Guidelines

  • Connect ANODE, GATE, and CATHODE pins of LM74700D-Q1 close to the MOSFET SOURCE, GATE, and DRAIN pins.
  • Use thick traces for source and drain of the MOSFET to minimize resistive losses because the high current path of for this design is through the MOSFET
  • Keep the charge pump capacitor across VCAP and ANODE pins away from the MOSFET to lower the thermal effects on the capacitance value.

  • Place input capacitor close to the device ANODE and GND pins.

  • Connect the Gate pin of the LM74700D-Q1 to the MOSFET gate with short trace. Avoid excessively thin and long trace to the Gate Drive.
  • Keep the GATE pin close to the MOSFET to avoid increase in MOSFET turn-off delay due to trace resistance.
  • Obtaining acceptable performance with alternate layout schemes is possible, however the layout shown in the Layout Example is intended as a guideline and to produce good results.