SNOSDB8A June   2021  – December 2021 LM74701-Q1

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Input Voltage
      2. 8.3.2 Charge Pump
      3. 8.3.3 Gate Driver
      4. 8.3.4 Enable
      5. 8.3.5 Battery Voltage Monitoring (SW)
    4. 8.4 Device Functional Modes
      1. 8.4.1 Shutdown Mode
      2. 8.4.2 Conduction Mode
        1. 8.4.2.1 Regulated Conduction Mode
        2. 8.4.2.2 Full Conduction Mode
        3. 8.4.2.3 VDS Clamp Mode
      3. 8.4.3 Reverse Current Protection Mode
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Design Considerations
        2. 9.2.2.2 MOSFET Selection
        3. 9.2.2.3 Charge Pump VCAP (CVCAP) and Input Capacitance (CIN)
        4. 9.2.2.4 Output Capacitance (COUT)
      3. 9.2.3 Application Curves
    3. 9.3 What to Do and What Not to Do
    4. 9.4 OR-ing Application Configuration
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Receiving Notification of Documentation Updates
    2. 12.2 Support Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.4.2.3 VDS Clamp Mode

The LM74701-Q1 features an integrated VDS clamp that operates the external MOSFET as an active clamp element to dissipate transient energy of automotive EMC transients such as ISO7637-2 pulse 1 where there is no output voltage hold up requirement and system is allowed to turn off during such EMC transients. VDS clamp threshold is selected such that LM74701-Q1 does not engage into VDS clamp operation thereby ensuring the FET remains OFF during the RCB state for the system level EMC tests where output voltage hold up is required such as input short interruptions and micro cuts (LV124 E-10, ISO16750-2).

When the ISO7637 pulse 1 is applied at the input of LM74701-Q1:

  1. After the voltage drop across ANODE to CATHODE reaches V(AK_REV) threshold, the device GATE goes low and turns OFF the MOSFET.
  2. After the voltage across the drain and source of the MOSFET reaches VCLAMP level (34-V minimum), GATE is turned ON back in the saturation region, operating external MOSFET as an active clamp and dissipates the ISO7637 pulse 1 energy. The typical circuit operation of LM74701-Q1 during ISO7637 pulse 1 is shown in Figure 8-4.
GUID-20211118-SS0I-SKLQ-NMHT-PWTZ9G696R8M-low.gifFigure 8-4 LM74701-Q1 Operation During VDS Clamp Mode

Note that the reverse current flows from VOUT back to input during the ISO7637 pulse 1 transient event, thus discharging VOUT capacitor. LM74701-Q1 CATHODE pin can handle negative voltage, however, if loads connected to the output of LM74701-Q1 can not handle negative voltage then the output hold up capacitor must be selected to ensure that VOUT does not go negative during ISO7637 pulse 1 test. For all the other ISO7637 pulses (that is, pulse 2a, 2b, 3a, 3b), which are short duration transient events, the input and output capacitors filtering effect suppresses these pulses.

For additional details on system level EMC performance of LM74701-Q1, refer to Application Information.