SLVSFH8B September   2021  – March 2022 LM74720-Q1

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Dual Gate Control (GATE, PD)
        1. 8.3.1.1 Reverse Battery Protection (A, C, GATE)
        2. 8.3.1.2 Load Disconnect Switch Control (PD)
      2. 8.3.2 Overvoltage Protection and Battery Voltage Sensing (VSNS, SW, OV)
      3. 8.3.3 Boost Regulator
    4. 8.4 Device Functional Mode (Shutdown Mode)
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical 12-V Reverse Battery Protection Application
      1. 9.2.1 Design Requirements for 12-V Battery Protection
      2. 9.2.2 Automotive Reverse Battery Protection
        1. 9.2.2.1 Input Transient Protection: ISO 7637-2 Pulse 1
        2. 9.2.2.2 AC Super Imposed Input Rectification: ISO 16750-2 and LV124 E-06
        3. 9.2.2.3 Input Micro-Short Protection: LV124 E-10
      3. 9.2.3 Detailed Design Procedure
        1. 9.2.3.1 Design Considerations
        2. 9.2.3.2 Boost Converter Components (C2, C3, L1)
        3. 9.2.3.3 Input and Output Capacitance
        4. 9.2.3.4 Hold-Up Capacitance
        5. 9.2.3.5 Overvoltage Protection and Battery Monitor
        6. 9.2.3.6 MOSFET Selection: Blocking MOSFET Q1
        7. 9.2.3.7 MOSFET Selection: Load Disconnect MOSFET Q2
        8. 9.2.3.8 TVS Selection
      4. 9.2.4 Application Curves
    3. 9.3 Do's and Don'ts
  10. 10Power Supply Recommendations
    1. 10.1 Transient Protection
    2. 10.2 TVS Selection for 12-V Battery Systems
    3. 10.3 TVS Selection for 24-V Battery Systems
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Third-Party Products Disclaimer
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

9.2.2.3 Input Micro-Short Protection: LV124 E-10

E-10 test specified in LV124 standard checks for immunity of electronic modules to short interruptions in power supply input due to contact issues or relay bounce. During this test (case 2), micro-short is applied on the input for a duration as low as 10 µs to several ms. For a functional pass status A, electronic modules are required to run uninterrupted during the E-10 test (case 2) with 100-µs duration. When input micro-short is applied for 100 µs, LM74720-Q1 quickly turns off MOSFET Q1 by shorting GATE to ANODE (source of MOSFET) within 0.5 µs to prevent the output from discharging and the PD remains ON keeping MOSFET Q2 ON, enabling fast recovery after the input short is removed.

Figure 9-5 shows performance of LM74720-Q1 during E10 input power supply interruption test case 2. After the input short is removed, input voltage recovers and MOSFET Q1 is turned back ON within 200 µs. Note that dual-gate drive topology allows MOSFET Q2 to remain ON during the test and helps in restoring the input power faster. Output voltage remains unperturbed during the entire duration, achieving functional status A.

GUID-20210906-SS0I-Z2XN-S9D6-DGNPR2FBR3XW-low.gifFigure 9-5 Input Micro-Short – LV124 E10 TC 2 100 µs
GUID-20210909-SS0I-2WKM-Z0HN-JMB0WSC3VDZ0-low.gifFigure 9-6 Input Micro-Short – LV124 E10 TC 2 100 µs With PD