SLVSFH8B September   2021  – March 2022 LM74720-Q1

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Dual Gate Control (GATE, PD)
        1. 8.3.1.1 Reverse Battery Protection (A, C, GATE)
        2. 8.3.1.2 Load Disconnect Switch Control (PD)
      2. 8.3.2 Overvoltage Protection and Battery Voltage Sensing (VSNS, SW, OV)
      3. 8.3.3 Boost Regulator
    4. 8.4 Device Functional Mode (Shutdown Mode)
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical 12-V Reverse Battery Protection Application
      1. 9.2.1 Design Requirements for 12-V Battery Protection
      2. 9.2.2 Automotive Reverse Battery Protection
        1. 9.2.2.1 Input Transient Protection: ISO 7637-2 Pulse 1
        2. 9.2.2.2 AC Super Imposed Input Rectification: ISO 16750-2 and LV124 E-06
        3. 9.2.2.3 Input Micro-Short Protection: LV124 E-10
      3. 9.2.3 Detailed Design Procedure
        1. 9.2.3.1 Design Considerations
        2. 9.2.3.2 Boost Converter Components (C2, C3, L1)
        3. 9.2.3.3 Input and Output Capacitance
        4. 9.2.3.4 Hold-Up Capacitance
        5. 9.2.3.5 Overvoltage Protection and Battery Monitor
        6. 9.2.3.6 MOSFET Selection: Blocking MOSFET Q1
        7. 9.2.3.7 MOSFET Selection: Load Disconnect MOSFET Q2
        8. 9.2.3.8 TVS Selection
      4. 9.2.4 Application Curves
    3. 9.3 Do's and Don'ts
  10. 10Power Supply Recommendations
    1. 10.1 Transient Protection
    2. 10.2 TVS Selection for 12-V Battery Systems
    3. 10.3 TVS Selection for 24-V Battery Systems
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Third-Party Products Disclaimer
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
Input Pins A to GND –65 70 V
VS, C to GND –0.3 70
VSNS, SW, EN, OV to GND, V(A) > 0 V –0.3 70
VSNS, SW, EN, OV to GND, V(A) ≤ 0 V V(A) (70 + V(A))
RTN to GND –65 0.3
IVSNS, ISW  –1 10 mA
IEN, IOV,  V(A) > 0 V –1
IEN, IOV,   V(A) ≤ 0 V Internally limited
Output Pins CAP to C –0.3 15.9 V
CAP to A –0.3 85
GATE to A –0.3 15
LX, CAP,  PD to GND –0.3 85
Output to Input Pins C to A –5 85
Operating junction temperature, Tj(2) –40 150 °C
Storage temperature, Tstg –40 150
Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute Maximum Ratings do not imply functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions. If used outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not be fully functional, and this may affect device reliability, functionality, performance, and shorten the device lifetime
High junction temperatures degrade operating lifetimes. Operating lifetime is de-rated for junction temperatures greater than 125°C.