SNOS975 Data sheet | 德州仪器 TI.com.cn

SNOS975G May 2001 – August 2015 LM8262

PRODUCTION DATA.

Package Options

Mechanical Data (Package|Pins)

DGK|8
- MPDS028E

Thermal pad, mechanical data (Package|Pins)

Orderable Information

6 Specifications

6.1 Absolute Maximum Ratings ⁽¹⁾⁽²⁾

over operating free-air temperature range (unless otherwise noted) ⁽⁶⁾

		MIN	MAX	UNIT
V_IN Differential			+/−10	V
Output Short Circuit Duration			See ⁽³⁾⁽⁴⁾
Supply Voltage (V⁺ - V⁻)			24	V
Voltage at Input/Output pins		V⁺ +0.8, V⁻ −0.8		V
Junction Temperature ⁽⁵⁾			+150	°C
Storage temperature range, T_stg		−65	+150	°C
Soldering Information:	Infrared or Convection (20 sec.)		235	°C
Soldering Information:	Wave Soldering (10 sec.)		260	°C

(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Rating indicate conditions for which the device is intended to be functional, but specific performance is not ensured. For ensured specifications and the test conditions, see the Electrical Characteristics.

(2) If Military/Aerospace specified devices are required, please contact the TI Sales Office/ Distributors for availability and specifications.

(3) Applies to both single‐supply and split‐supply operation. Continuous short circuit operation at elevated ambient temperature can result in exceeding the maximum allowed junction temperature of 150°C.

(4) Output short circuit duration is infinite for V_S ≤ 6V at room temperature and below. For V_S > 6V, allowable short circuit duration is 1.5ms.

(5) The maximum power dissipation is a function of T_J(max), R_θJA, and T_A. The maximum allowable power dissipation at any ambient temperature is P_D = (T_J(max) - T_A)/R_θJA. All numbers apply for packages soldered directly onto a PC board.

(6) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

6.2 ESD Ratings

			VALUE	UNIT
V_(ESD)	Electrostatic discharge⁽¹⁾	Human Body Model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins⁽²⁾	±2000	V
V_(ESD)	Electrostatic discharge⁽¹⁾	Machine Model (MM)⁽³⁾	±200	V

(1) Human Body Model, 1.5 kΩ in series with 100 pF. Machine Model, 0 Ω is series with 200 pF.

(2) JEDEC document JEP155 states that 2000-V HBM allows safe manufacturing with a standard ESD control process.

(3) JEDEC document JEP157 states that 200-V MM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

		MIN	MAX	UNIT
Supply Voltage (V⁺ - V⁻)		2.5	22	V
Operating Temperature Range⁽⁵⁾		−40	+85	°C

6.4 Thermal Information

THERMAL METRIC⁽¹⁾		DGK	UNIT
THERMAL METRIC⁽¹⁾		8 PINS	UNIT
R_θJA	Junction-to-ambient thermal resistance⁽²⁾	235	°C/W

(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

(2) The maximum power dissipation is a function of T_J(max),R_θJA, and T_A. The maximum allowable power dissipation at any ambient temperature is P_D = (T_J(max) - T_A)/R_θJA. All numbers apply for packages soldered directly onto a PC board.

6.5 2.7V Electrical Characteristics

Unless otherwise specified, all limits ensured for V⁺ = 2.7V, V⁻ = 0V, V_CM = 0.5V, V_O = V⁺/2, and R_L > 1MΩ to V⁻. Boldface limits apply at the temperature extremes.

	PARAMETER	TEST CONDITIONS	MIN⁽²⁾	TYP⁽¹⁾	MAX⁽²⁾	UNIT
V_OS	Input Offset Voltage	V_CM = 0.5V & V_CM = 2.2V	–	+/−0.7	+/−5 +/−7	mV
TC V_OS	Input Offset Average Drift	V_CM = 0.5V & V_CM = 2.2V ⁽³⁾	–	+/−2	–	µV/C
I_B	Input Bias Current	V_CM = 0.5V ⁽⁴⁾	–	−1.20	−2.00 −2.70	µA
I_B	Input Bias Current	V_CM = 2.2V ⁽⁴⁾	–	+0.49	+1.00 +1.60	µA
I_OS	Input Offset Current	V_CM = 0.5V & V_CM = 2.2V	–	20	250 400	nA
CMRR	Common Mode Rejection Ratio	V_CM stepped from 0V to 1.0V	76 60	100	–	dB
		V_CM stepped from 1.7V to 2.7V	–	100	–
		V_CM stepped from 0V to 2.7V	58 50	70	–
+PSRR	Positive Power Supply Rejection Ratio	V⁺ = 2.7V to 5V	78 74	104	–	dB
CMVR	Input Common-Mode Voltage Range	CMRR > 50dB	–	−0.3	−0.1 0.0	V
CMVR	Input Common-Mode Voltage Range	CMRR > 50dB	2.8 2.7	3.0	–	V
A_VOL	Large Signal Voltage Gain	V_O = 0.5 to 2.2V, R_L = 10k to V⁻	70 67	78	–	dB
A_VOL	Large Signal Voltage Gain	V_O = 0.5 to 2.2V, R_L = 2k to V⁻	67 63	73	–	dB
V_O	Output Swing High	R_L = 10k to V⁻	2.49 2.46	2.59	–	V
	Output Swing High	R_L = 2k to V⁻	2.45 2.41	2.53	–	V
	Output Swing Low	R_L = 10k to V⁻	–	90	100 120	mV
I_SC	Output Short Circuit Current	Sourcing to V⁻ V_ID = 200mV ⁽⁵⁾⁽⁶⁾	30 20	48	–	mA
I_SC	Output Short Circuit Current	Sinking to V⁺ V_ID = −200mV ⁽⁵⁾⁽⁶⁾	50 30	65	–	mA
I_S	Supply Current (both amps)	No load, V_CM = 0.5V	–	2.0	2.5 3.0	mA
SR	Slew Rate ⁽⁷⁾	A_V = +1,V_I = 2V_PP	–	9	–	V/µs
f_u	Unity Gain-Frequency	V_I = 10mV, R_L = 2kΩ to V⁺/2	–	10	–	MHz
GBWP	Gain Bandwidth Product	f = 50KHz	15.5 14	21	–	MHz
Phi_m	Phase Margin	V_I = 10mV	–	50	–	Deg
e_n	Input-Referred Voltage Noise	f = 2KHz, R_S = 50Ω	–	15	–	nV/ √Hz
i_n	Input-Referred Current Noise	f = 2KHz	–	1	–	pA/ √Hz
f_max	Full Power Bandwidth	Z_L = (20pF \|\| 10kΩ) to V⁺/2	–	1	–	MHz

(1) Typical Values represent the most likely parametric norm.

(2) All limits are ensured by testing or statistical analysis.

(3) Offset voltage average drift determined by dividing the change in V_OS at temperature extremes into the total temperature change.

(4) Positive current corresponds to current flowing into the device.

(5) Short circuit test is a momentary test.

(6) Output short circuit duration is infinite for V_S ≤ 6V at room temperature and below. For V_S > 6V, allowable short circuit duration is 1.5ms.

(7) Slew rate is the slower of the rising and falling slew rates. Connected as a Voltage Follower.

6.6 5V Electrical Characteristics

Unless otherwise specified, all limits ensured for V⁺ = 5V, V⁻ = 0V, V_CM = 1V, V_O = V⁺/2, and R_L > 1MΩ to V⁻. Boldface limits apply at the temperature extremes.

	PARAMETER	TEST CONDITIONS	MIN⁽²⁾	TYP⁽¹⁾	MAX⁽²⁾	UNIT
V_OS	Input Offset Voltage	V_CM = 1V & V_CM = 4.5V	–	+/−0.7	+/−5 +/− 7	mV
TC V_OS	Input Offset Average Drift	V_CM = 1V & V_CM = 4.5V ⁽³⁾	–	+/−2	–	µV/°C
I_B	Input Bias Current	V_CM = 1V ⁽⁴⁾	–	−1.18	−2.00 −2.70	µA
I_B	Input Bias Current	V_CM = 4.5V ⁽⁴⁾	–	+0.49	+1.00 +1.60	µA
I_OS	Input Offset Current	V_CM = 1V & V_CM = 4.5V	–	20	250 400	nA
CMRR	Common Mode Rejection Ratio	V_CM stepped from 0V to 3.3V	84 72	110	–	dB
		V_CM stepped from 4V to 5V	–	100	–
		V_CM stepped from 0V to 5V	64 61	80	–
+PSRR	Positive Power Supply Rejection Ratio	V⁺ = 2.7V to 5V, V_CM = 0.5V	78 74	104	–	dB
CMVR	Input Common-Mode Voltage Range	CMRR > 50dB	–	−0.3	−0.1 0.0	V
CMVR	Input Common-Mode Voltage Range	CMRR > 50dB	5.1 5.0	5.3	–	V
A_VOL	Large Signal Voltage Gain	V_O = 0.5 to 4.5V, R_L = 10k to V⁻	74 70	84	–	dB
A_VOL	Large Signal Voltage Gain	V_O = 0.5 to 4.5V, R_L = 2k to V⁻	70 66	80	–	dB
V_O	Output Swing High	R_L = 10k to V⁻	4.75 4.72	4.87	–	V
	Output Swing High	R_L = 2k to V⁻	4.70 4.66	4.81	–	V
	Output Swing Low	R_L = 10k to V⁻	–	86	125 135	mV
I_SC	Output Short Circuit Current	Sourcing to V⁻ V_ID = 200mV ⁽⁵⁾⁽⁶⁾	35 20	53	–	mA
I_SC	Output Short Circuit Current	Sinking to V⁺ V_ID = −200mV ⁽⁵⁾⁽⁶⁾	60 50	75	–	mA
I_S	Supply Current (both amps)	No load, V_CM = 1V	–	2.3	2.8 3.5	mA
SR	Slew Rate ⁽⁷⁾	A_V = +1, V_I = 5V_PP	10 7	12	–	V/µs
f_u	Unity Gain Frequency	V_I = 10mV, R_L = 2kΩ to V⁺/2	–	10.5	–	MHz
GBWP	Gain-Bandwidth Product	f = 50KHz	16 15	21	–	MHz
Phi_m	Phase Margin	V_I = 10mV	–	53	–	Deg
e_n	Input-Referred Voltage Noise	f = 2KHz, R_S = 50Ω	–	15	–	nV/ √Hz
i_n	Input-Referred Current Noise	f = 2KHz	–	1	–	pA/ √Hz
f_max	Full Power Bandwidth	Z_L = (20pF \|\| 10kΩ) to V⁺/2	–	900	–	KHz
t_S	Settling Time (+/−5%)	100mV_PP Step, 500pF load	–	400	–	ns
THD+N	Total Harmonic Distortion + Noise	R_L = 1kΩ to V⁺/2 f = 10KHz to A_V= +2, 4V_PP swing	–	0.05%	–