SNOS515F October   2000  – August 2015 LM8272

PRODUCTION DATA.  

  1. 1Features
  2. 2Applications
  3. 3Description
  4. 4Revision History
  5. 5Pin Configuration and Functions
  6. 6Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 5V Electrical Characteristics
    6. 6.6 12V Electrical Characteristics
    7. 6.7 Typical Performance Characteristics
  7. 7Application and Implementation
    1. 7.1 Block Diagram and Operational Description A) Input Stage:
    2. 7.2 B) Output Stage:
    3. 7.3 C) Output Voltage Swing Close to V−:
    4. 7.4 Driving Capactive Loads:
    5. 7.5 Estimating the Output Voltage Swing
    6. 7.6 Output Short Circuit Current and Dissipation Issues:
    7. 7.7 Other Application Hints:
    8. 7.8 LM8272 Advantages:
  8. 8Device and Documentation Support
    1. 8.1 Community Resources
    2. 8.2 Trademarks
    3. 8.3 Electrostatic Discharge Caution
    4. 8.4 Glossary
  9. 9Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Specifications

6.1 Absolute Maximum Ratings(1)(3)

over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
VIN Differential +/−10 V
Output Short Circuit Duration See(5)(6)
Supply Voltage (V+ - V−) 27 V
Voltage at Input/Output pins V+ +0.3, V− −0.3 V
Junction Temperature(4) +150 °C
Storage temperature range, Tstg −65 +150 °C
Soldering Information: Infrared or Convection (20 sec.) 235 °C
Wave Soldering (10 sec.) 260 °C
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Rating indicate conditions for which the device is intended to be functional, but specific performance is not ensured. For ensured specifications and the test conditions, see the Electrical Characteristics.
(2) Human body model, 1.5 kΩ in series with 100 pF. Machine Model, 0 Ω is series with 200 pF.
(3) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and specifications.
(4) The maximum power dissipation is a function of TJ(max), RθJA, and TA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(max) - TA)/ RθJA. All numbers apply for packages soldered directly onto a PC board.
(5) Applies to both single‐supply and split‐supply operation. Continuous short circuit operation at elevated ambient temperature can result in exceeding the maximum allowed junction temperature of 150°C.
(6) Output short circuit duration is infinite for VS ≤ 6 V at room temperature and below. For VS > 6 V, allowable short circuit duration is 1.5 ms.

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge(2) Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(1) ±2000 V
Machine Model (MM)(2) ±200
(1) JEDEC document JEP155 states that 2000-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 200-V MM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
Supply Voltage (V+ - V−) 2.5 24 V
Operating Temperature Range(1) −40 +85 °C
(1) The maximum power dissipation is a function of TJ(max), RθJA, and TA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(max) - TA)/ RθJA. All numbers apply for packages soldered directly onto a PC board.

6.4 Thermal Information

THERMAL METRIC(1) DGK UNIT
8 Pins
RθJA Junction-to-ambient thermal resistance(1)  235 °C/W
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

6.5 5V Electrical Characteristics

Unless otherwise specified, all limited ensured for V+ = 5V, V− = 0V, VCM = 0.5V, VO = V+/2, and RL > 1MΩ to V−. Boldface limits apply at the temperature extremes.
PARAMETER TEST CONDITIONS TYP(1) LIMIT(2) UNIT
VOS Input Offset Voltage VCM = 0.5V & VCM = 4.5V +/−0.7 +/−5
+/− 7		 mV
max
TC VOS Input Offset Average Drift VCM = 0.5V & VCM = 4.5V(3) +/−2 — µV/°C
IB Input Bias Current See (4) — ±2.00
±2.70		 µA
max
IOS Input Offset Current 20 250
400		 nA
max
CMRR Common Mode Rejection Ratio VCM stepped from 0V to 5V 80 64
61		 dB
min
+PSRR Positive Power Supply Rejection Ratio V+ from 4.5V to 13V 100 78
74		 dB
min
CMVR Input Common-Mode Voltage Range CMRR > 50dB −0.3 −0.1
0.0		 V
max
5.3 5.1
5.0		 V
min
AVOL Large Signal Voltage Gain VO = 0.5 to 4.5V,
RL = 10kΩ to V+/2		 80 64
60		 dB
min
VO Output Swing
High		 RL = 10kΩ to V− 4.93 4.85 V
min
ISOURCE = 5mA 4.85 4.70
Output Swing
Low		 RL = 10kΩ to V+ 215 250 mV
max
ISINK = 5mA 300 350
ISC Output Short Circuit Current Sourcing to V−
VID = 200mV(5)		 100 — mA
Sinking to V+
VID = −200mV(5)		 100 —
IOUT Output Current VID = ±200mV, VO = 1V from rails ±55 — mA
IS Supply Current (Both Channel) No load, VCM = 0.5V 1.8 2.3
2.8		 mA
max
SR Slew Rate(6) AV = +1, VI = 5VPP 12 — V/µs
fu Unity Gain Frequency VI = 10mVp, RL = 2KΩ to V+/2 7.5 — MHz
GBWP Gain-Bandwidth Product f = 50KHz 13 — MHz
Phim Phase Margin VI = 10mVp, RL = 2kΩ to V+/2 55 — deg
en Input-Referred Voltage Noise f = 2KHz, RS = 50Ω 15 — nV/√Hz
in Input-Referred Current Noise f = 2KHz 1.4 — pA/√Hz
fmax Full Power Bandwidth ZL = (20pF || 10kΩ) to V+/2 700 — kHz
(1) Typical Values represent the most likely parametric norm.
(2) All limits are ensured by testing or statistical analysis.
(3) Offset voltage average drift determined by dividing the change in VOS at temperature extremes into the total temperature change.
(4) Positive current corresponds to current flowing into the device.
(5) Short circuit test is a momentary test. Output short circuit duration is infinite for VS ≤ 6V at room temperature and below. For VS > 6V, allowable short circuit duration is 1.5ms.
(6) Slew rate is the slower of the rising and falling slew rates. Connected as a Voltage Follower.

6.6 12V Electrical Characteristics

Unless otherwise specified, all limited ensured for V+ = 12V, V− = 0V, VCM = 6V, VO = 6V, and RL > 1MΩ to V−. Boldface limits apply at the temperature extremes.
PARAMETER TEST CONDITIONS TYP(1) LIMIT(2) UNIT
VOS Input Offset Voltage VCM = 0.5V & VCM = 11.5V +/−0.7 +/−7
+/− 9		 mV
max
TC VOS Input Offset Average Drift VCM = 0.5V & VCM = 11.5V(4) +/−2 — µV/°C
IB Input Bias Current See (4) — ±2.00
±2.80		 µA
max
IOS Input Offset Current 30 275
550		 nA
max
CMRR Common Mode Rejection Ratio VCM stepped from 0V to 12V 88 74
72		 dB
min
+PSRR Positive Power Supply Rejection Ratio V+ from 4.5V to 13V, VCM = 0.5V 100 78
74		 dB
min
−PSRR Negative Power Supply Rejection Ratio 85 — dB
CMVR Input Common-Mode Voltage Range CMRR > 50dB −0.3 −0.1
0		 V
max
12.3 12.1
12.0		 V
min
AVOL Large Signal Voltage Gain VO = 1V to 11V
RL = 10kΩ to V+/2		 83 74
70		 dB
min
VO Output Swing
High		 RL 10kΩ to V+/2 11.8 11.7 V
min
ISOURCE = 5mA 11.6 11.5
Output Swing
Low		 RL = 10kΩ to V+/2 0.25 0.3 V
max
ISINK = 5mA .40 .45
ISC Output Short Circuit Current Sourcing to V−
VID = 200mV (3)		 130 110 mA
min
Sinking to V+
VID = 200mV (3)		 130 110
IOUT Output Current VID = ±200mV, VO = 1V from rails ±65 — mA
IS Supply Current (Both Channel) No load, VCM = 0.5V 1.9 2.4
2.9		 mA
max
SR Slew Rate(5) AV = +1, VI = 10VPP, CL = 10pF 15 — V/µs
AV = +1, VI = 10VPP, CL = 0.1µF 1 —
ROUT Close Loop Output Resistance AV = +1, f = 100KHz 3 — Ω
fu Unity Gain Frequency VI = 10mVp, RL = 2kΩ to V+/2 8 — MHz
GBWP Gain-Bandwidth Product f = 50KHz 15 — MHz
Phim Phase Margin VI = 10mVp, RL = 2kΩ to V+/2 57 — Deg
GM Gain Margin VI = 10mVp, RL = 2kΩ to V+/2 20 — dB
−3dB BW Small Signal -3db Bandwidth AV = +1, RL = 2kΩ to V+/2 12.5 — MHz
AV = +1, RL = 600Ω to V+/2 10.5 —
AV = +10, RL = 600Ω to V+/2 1.0 —
en Input-Referred Voltage Noise f = 2KHz, RS = 50Ω 15 — nV/√Hz
in Input-Referred Current Noise f = 2KHz 1.4 — pA/√Hz
fmax Full Power Bandwidth ZL = (20pF || 10kΩ) to V+/2 300 — kHz
THD+N Total Harmonic Distortion +Noise AV = +2, RL = 2kΩ to V+/2
VO = 8VPP, VS = ±5V		 0.02% —
CT Rej. Cross-Talk Rejection f = 5MHz, Driver RL = 10kΩ to V+/2 68 — dB
(1) Typical Values represent the most likely parametric norm.
(2) All limits are ensured by testing or statistical analysis.
(3) Short circuit test is a momentary test. Output short circuit duration is infinite for VS ≤ 6V at room temperature and below. For VS > 6V, allowable short circuit duration is 1.5ms.
(4) Offset voltage average drift determined by dividing the change in VOS at temperature extremes into the total temperature change.
(5) Slew rate is the slower of the rising and falling slew rates. Connected as a Voltage Follower.

6.7 Typical Performance Characteristics

LM8272 101308a2.png
Figure 1. VOS Distribution
LM8272 10130829.png
Figure 3. VOS vs. VCM for 3 Representative Units
LM8272 10130884.png
Figure 5. VOS vs. VS for 3 Representative Units
LM8272 10130882.png
Figure 7. VOS vs. VS for 3 Representative Units
LM8272 101308a3.png
Figure 9. IB vs. VS
LM8272 10130875.png
Figure 11. IS vs. VCM
LM8272 10130873.png
Figure 13. IS vs. VS
LM8272 10130888.png
Figure 15. +PSRR vs. Frequency
LM8272 10130893.png
Figure 17. Open Loop Gain/Phase
for Various Supplies
LM8272 10130895.png
Figure 19. Closed Loop Frequency Response
for Various Gains
LM8272 10130876.png
Figure 21. Maximum Output Swing vs. Load
(1% Distortion)
LM8272 10130886.png
Figure 23. Closed Loop Small Signal Frequency Response
for Various CL
LM8272 10130879.png
Figure 25. Settling Time (±1%) & Slew Rate vs. Cap Load
LM8272 10130897.png
Figure 27. VOUT from V− vs. ISINK
LM8272 101308a1.png
Figure 29. Step Response for Various Amplitudes
LM8272 10130892.png
Figure 31. THD+N vs. Input Amplitude
for Various Frequency
LM8272 10130885.png
Figure 33. Closed Loop Output Impedance vs. Frequency
LM8272 10130830.png
Figure 2. VOS vs. VCM for 3 Representative Units
LM8272 10130831.png
Figure 4. VOS vs. VCM for 3 Representative Units
LM8272 10130883.png
Figure 6. VOS vs. VS for 3 Representative Units
LM8272 10130871.png
Figure 8. IB vs. VS
LM8272 10130872.png
Figure 10. IS vs. VCM
LM8272 10130874.png
Figure 12. IS vs. VS
LM8272 10130887.png
Figure 14. CMRR vs. Frequency
LM8272 10130889.png
Figure 16. −PSRR vs. Frequency
LM8272 10130896.png
Figure 18. Closed Loop Frequency Response
for Various Gains
LM8272 10130894.png
Figure 20. Closed Loop Frequency Response
for Various RL
LM8272 10130877.png
Figure 22. Maximum Output Swing vs. Frequency
(1% Distortion)
LM8272 10130878.png
Figure 24. Overshoot vs. Cap Load
LM8272 10130898.png
A.
Figure 26. VOUT from V+ vs. ISOURCE
LM8272 101308a0.png
Figure 28. Step Response for Various Amplitudes
LM8272 10130899.png
Figure 30. Large Signal Step Response
for Various Cap Loads
LM8272 10130880.png
Figure 32. Input Referred Noise Density
LM8272 10130881.png
Figure 34. Crosstalk Rejection vs. Frequency