SNOS738I April   1995  – January 2017 LM9061 , LM9061-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings: LM9061
    3. 6.3 ESD Ratings: LM9061-Q1
    4. 6.4 Recommended Operating Conditions
    5. 6.5 Thermal Information
    6. 6.6 Electrical Characteristics
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 MOSFET Gate Drive
      2. 7.3.2 Basic Operation
      3. 7.3.3 Turn On and Turn Off Characteristics
      4. 7.3.4 Lossless Overcurrent Protection
      5. 7.3.5 Delay Timer
        1. 7.3.5.1 Minimum Delay Time
      6. 7.3.6 Overvoltage Protection
      7. 7.3.7 Reverse Battery
      8. 7.3.8 Low Battery
      9. 7.3.9 Increasing MOSFET Turnon Time
    4. 7.4 Device Functional Modes
      1. 7.4.1 Operation With VCC > 30 V
      2. 7.4.2 Operation With VCC < 6.2 V
      3. 7.4.3 Operation With ON/OFF Control
      4. 7.4.4 MOSFET Latch-OFF
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 TITLE NEEDED
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Bidirectional Applications
        1. 8.2.2.1 Back-to-Back MOSFET Configuration
          1. 8.2.2.1.1 Application Curve
        2. 8.2.2.2 Bidirectional Switch With Reverse Overcurrent Protection
          1. 8.2.2.2.1 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Examples
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Related Links
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Community Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Pin Configuration and Functions

D Package
8-Pin SOIC
Top View

Pin Functions

PIN I/O DESCRIPTION
NAME NO.
Sense 1 I The inverting input to the protection comparator, connected to the external MOSFET source pin and the load.
Threshold 2 I The noninverting input to the protection comparator, and a current sink for the threshold resistor to set the allowed voltage drop across the external MOSFET.
Ground 3 — Ground
Output 4 O The gate drive connection. Charges, and discharges, the MOSFET gate.
VCC 5 I The voltage supply pin. The VCC operating range has a minimum value of 7 V, and a maximum value of 26 V.
IREF 6 O A resistor on this pin to ground sets the current through the threshold resistor, which sets the allowed voltage drop across the external MOSFET.
On/Off 7 I The control pin. A low voltage, VIN(0), will disable device operation, while a high voltage, VIN(1), will enable device operation.
Delay 8 O A capacitor on this pin to ground will provide a delay time between when the protection comparator detects excessive VGS across the MOSFET and when the gate drive circuitry is latched-OFF.