SNAS264D April 2006 – February 2024 LM94
PRODUCTION DATA
Several registers in the LM94 use 4-bit values to represent a duty cycle. All of them use a common mapping that associates the 4-bit value with a duty cycle. The 4-bit values correspond also with the 14 steps of the auto fan control algorithm. The mapping is shown below. This applies for PWM outputs running at the default 22.5 kHz (high) frequency.
4-Bit Value | Step | 22.5 kHz (High Frequency) Duty Cycle |
---|---|---|
0h | 0.00% | |
1h | 1 | 25.00% |
2h | 2 | 31.25% |
3h | 3 | 37.50% |
4h | 4 | 43.75% |
5h | 5 | 50.00% |
6h | 6 | 56.25% |
7h | 7 | 62.50% |
8h | 8 | 68.75% |
9h | 9 | 75.00% |
Ah | 10 | 81.25% |
Bh | 11 | 87.50% |
Ch | 12 | 93.75% |
Dh | 13 | 100.00% |
Eh | — | Reserved |
Fh | — | Reserved |