SNIS133E September 2003 – February 2024 LM95010
PRODUCTION DATA
The LM95010 may initiate an Attention Request when the SensorPath bus is inactive.
Note that a Data Bit, or Start Bit, from the master may start simultaneously with an Attention Request from the LM95010. In addition, two LM95010s may start an Attention Request simultaneously. Due to its length, the Attention Request has priority over any other "bit signal", except Reset. Conflict with Data Bits and Start Bits are detected by all the devices, to allow the bits to be ignored and re-issued by their originator.
The LM95010 will either check to see that the bus is inactive before starting an Attention Request, or start the Attention Request with the tSFEdet time interval after SWD becomes active. The LM95010 will drive the signal low for tSLoutA time. After this, both the master and the LM95010 must monitor the bus for a Reset Condition. If a Reset condition is detected, the current "bit signal" is not treated as an Attention Request.
After Reset, an Attention Request can not be sent before the master has sent 14 Data Bits on the bus. See Section 6.3.13 for further details on Attention Request generation.