SNIS133E September 2003 – February 2024 LM95010
PRODUCTION DATA
A master must monitor the bus as inactive before beginning a Start Bit.
The master uses a Start Bit to indicate the beginning of a transfer. LM95010s will monitor for Start Bits all the time, to allow synchronization of transactions with the master. If a Start Bit occurs in the middle of a transaction, the LM95010 being addressed will abort the current transaction. In this case the transaction is not "completed" by the LM95010 (see Section 6.3.8).
During each Start Bit, both the master and all the LM95010s must monitor the bus for Attention Request and Reset, by measuring the time SWD is active (low). If an Attention Request or Reset condition is detected, the current "bit signal" is not treated as a Start Bit. The master may attempt to send the Start Bit at a later time.