SNAS558N January   2000  – March 2024 LMC555

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Low-Power Dissipation
      2. 7.3.2 Various Packages and Compatibility
      3. 7.3.3 Operates in Both Astable and Monostable Mode
    4. 7.4 Device Functional Modes
      1. 7.4.1 Monostable Operation
      2. 7.4.2 Astable Operation
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Flash LED in Monostable Mode
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curve
      2. 8.2.2 Frequency Divider
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Application Curve
      3. 8.2.3 Pulse Width Modulator
        1. 8.2.3.1 Design Requirements
        2. 8.2.3.2 Application Curve
      4. 8.2.4 Pulse Position Modulator
        1. 8.2.4.1 Design Requirements
        2. 8.2.4.2 Application Curve
      5. 8.2.5 50% Duty Cycle Oscillator
        1. 8.2.5.1 Design Requirements
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 Support Resources
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • D|8
  • P|8
  • YPB|8
  • DGK|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.4.1 Monostable Operation

In this mode of operation, the timer functions as a one-shot (Figure 7-2). The external capacitor is initially held discharged by internal circuitry. Upon application of a negative trigger pulse of less than 1/3 VS to the TRIGGER pin, the flip-flop is set, which both releases the short circuit across the capacitor and drives the output high.

GUID-A1FABC83-4CCA-47C0-A639-64BDA6871B49-low.pngFigure 7-2 Monostable (One-Shot)

The voltage across the capacitor then increases exponentially for a period of tH = 1.1 RAC. This period is also the time that the output stays high, at the end of which time the voltage equals 2/3 VS. The comparator then resets the flip-flop, which in turn discharges the capacitor and drives the output to the low state. Figure 7-3 shows the waveforms generated in this mode of operation. Because the charge and the threshold level of the comparator are both directly proportional to supply voltage, the timing internal is independent of supply.

GUID-6A0BA9A0-DE13-4DC9-BE87-0688D6FE437B-low.png
VS = 5 V Top trace: Input 5 V/div RA = 9.1 kΩ
TIME = 0.1 ms/div Middle trace: Output 5 V/div C = 0.01 µF
Bottom trace: Capacitor voltage 2 V/div
Figure 7-3 Monostable Waveforms

RESET overrides TRIGGER, which can override THRESHOLD. Therefore, ensure that the trigger pulse is shorter than the desired tH. The minimum pulse duration for TRIGGER is 20 ns, and is 400 ns for RESET. During the timing cycle when the output is high, the further application of a trigger pulse does not effect the circuit as long as the trigger input is returned high at least 10 µs before the end of the timing interval. However the circuit can be reset during this time by the application of a negative pulse to the RESET pin. The output remains in the low state until a trigger pulse is applied again.

When the reset function is not used, connect the RESET pin to V+ to avoid any possibility of false triggering. Figure 7-4 is a nomograph for easy determination of RC values for various time delays.

Note:

In monostable operation, drive the trigger high before the end of timing cycle.

GUID-F647B67D-12DD-4841-9F6C-A8E259C859FA-low.png Figure 7-4 Time Delay