SNOS609D November   1994  – February 2024 LMC6032 , LMC6034

PRODUCTION DATA  

  1.   1
  2. 1Features
  3. 2Applications
  4. 3Description
  5. 4Pin Configuration and Functions
  6. 5Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information LMC6032
    5. 5.5 Thermal Information LMC6034
    6. 5.6 Electrical Characteristics
    7.     Typical Characteristics
  7. 6Application and Implementation
    1. 6.1 Application Information
      1. 6.1.1 Amplifier Topology
      2. 6.1.2 Compensating Input Capacitance
      3. 6.1.3 Capacitive Load Tolerance
      4. 6.1.4 Bias Current Testing
    2. 6.2 Typical Applications
      1.      Typical Single-Supply Applications
    3. 6.3 Layout
      1. 6.3.1 Layout Guidelines
        1. 6.3.1.1 Printed Circuit Board Layout for High-Impedance Work
  8. 7Device and Documentation Support
    1. 7.1 Receiving Notification of Documentation Updates
    2. 7.2 Support Resources
    3.     Trademarks
    4. 7.3 Electrostatic Discharge Caution
    5. 7.4 Glossary
  9. 8Revision History
  10. 9Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • D|14
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.1.4 Bias Current Testing

The test method of Figure 6-5 is appropriate for bench-testing bias current with reasonable accuracy. To understand the circuit operation, first close switch S2 momentarily. When S2 is opened, then:

Equation 7. I b - =   d V O U T d t   × C 2
GUID-615C1AB3-8E50-47B8-B65D-C42E627612CE-low.pngFigure 6-5 Simple Input Bias Current Test Circuit

A recommended capacitor for C2 is a 5pF or 10pF silver mica, NPO ceramic, or air-dielectric. When determining the magnitude of Ib−, the leakage of the capacitor and socket must be taken into account. Leave switch S2 shorted most of the time, or else the dielectric absorption of the capacitor C2 can cause errors.

Similarly, if S1 is shorted momentarily (while leaving S2 shorted), then:

Equation 8. I b + =   d V O U T d t   × C 1 + C x

where Cx is the stray capacitance at the + input.