SNOS875H January   2000  – December 2024 LMC6035 , LMC6036

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information: LMC6035
    5. 5.5 Thermal Information: LMC6036
    6. 5.6 Electrical Characteristics
    7. 5.7 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Capacitive Load Tolerance
    2. 7.2 Typical Applications
      1. 7.2.1 Differential Driver
      2. 7.2.2 Low-Pass Active Filter
        1. 7.2.2.1 Low-Pass Frequency Scaling Procedure
      3. 7.2.3 High-Pass Active Filter
        1. 7.2.3.1 High-Pass Frequency Scaling Procedure
      4. 7.2.4 Dual-Amplifier Bandpass Filter
        1. 7.2.4.1 DABP Component Selection Procedure
    3. 7.3 Layout
      1. 7.3.1 Layout Guidelines
        1. 7.3.1.1 Printed Circuit Board (PCB) Layout for High-Impedance Work
        2. 7.3.1.2 DSBGA Considerations
      2. 7.3.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Receiving Notification of Documentation Updates
    2. 8.2 Support Resources
    3.     Trademarks
    4. 8.3 Electrostatic Discharge Caution
    5. 8.4 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • D|8
  • YAF|8
  • DGK|8
  • YZR|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.6 Electrical Characteristics

at TJ = +25°C, V+ = 2.7V, V– = 0V, VCM = 1V, VOUT = V+ / 2, and RL > 1MΩ (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
OFFSET VOLTAGE
VOS Input offset voltage ±0.5 ±5 mV
TJ = –40°C to +85°C ±6
dVOS/dT Input offset voltage drift TJ = –40°C to +85°C ±2.3 µV/°C
PSRR Power-supply rejection ratio Positive,
5V ≤ V+ ≤ 15V		 63 93 dB
TJ = –40°C to +85°C 60
Negative, 
0V ≤ V– ≤ –10V, VO = 2.5V,
V+ = 5V		 74 97
TJ = –40°C to +85°C 70
INPUT BIAS CURRENT
IB Input bias current(1) ±20 fA
TJ = –40°C to +85°C ±90 pA
IOS Input offset current(1) ±10 fA
TJ = –40°C to +85°C ±45 pA
NOISE
en Input voltage noise density f = 1kHz  V+ = 15V, VCM = V+ / 2 27 nV/√Hz
VCM = 1V 40
in Input current noise density f = 1kHz  6 fA/√Hz
THD Total harmonic distortion f= 10kHz, G = –10V/V, RL = 2kΩ, VOUT = 8Vpp, V+ = 10V 0.01 %
INPUT VOLTAGE
VCM Common-mode voltage To positive rail,
For CMRR ≥ 40dB		 2.0 2.3 V
TJ = –40°C to +85°C 1.7
To negative rail
For CMRR ≥ 40dB		 –0.1 0.3
TJ = –40°C to +85°C 0.5
To positive rail,
For CMRR ≥ 40dB, V+ = 3V		 2.3 2.6
TJ = –40°C to +85°C 2.0
To negative rail
For CMRR ≥ 40dB, V+ = 3V		 –0.3 0.1
TJ = –40°C to +85°C 0.3
To positive rail,
For CMRR ≥ 50dB, V+ = 5V		 4.2 4.5
TJ = –40°C to +85°C 3.9
To negative rail
For CMRR ≥ 50dB, V+ = 5V		 –0.5 –0.2
TJ = –40°C to +85°C 0.0
To positive rail,
For CMRR ≥ 50dB, V+ = 15V		 14.0 14.4
TJ = –40°C to +85°C 13.7
To negative rail
For CMRR ≥ 50dB, V+ = 15V		 –0.5 –0.2
TJ = –40°C to +85°C 0.0
CMRR Common-mode rejection ratio V+ = 15V,
0.7V ≤ VCM ≤ 12.7V		 63 96 dB
TJ = –40°C to +85°C 60
INPUT IMPEDANCE
RIN Input resistance >10 TΩ
OPEN-LOOP GAIN
AOL Open-loop voltage gain Sourcing, V+ = 15V, VCM = 7.5V,
7.5V ≤ VO ≤ 11.5V		 RL = 2kΩ to 7.5V 2000 V/mV
RL = 600Ω to 7.5V 100 1000
RL = 600Ω to to 7.5V,
TJ = –40°C to +85°C		 75
Sinking, V+ = 15V, VCM = 7.5V,
3.5V ≤ VO ≤ 7.5V		 RL = 2kΩ to 7.5V 500
RL = 600Ω to 7.5V 25 250
RL = 600Ω to 7.5V,
TJ = –40°C to +85°C		 20
FREQUENCY RESPONSE
GBW Gain bandwidth product 1.4 MHz
SR Slew rate(2) VS = 15V, 10V step 1.5 V/µs
θm Phase margin 48 °
Gm Gain margin 17 dB
Crosstalk Dual and quad channel, V+ = 15V, RL = 100kΩ to 7.5V, f = 1kHz, VOUT = 12Vpp 130 dB
OUTPUT
VO Voltage output swing To positive rail,
RL = 2kΩ to 1.35V		 2.4 2.62 V
TJ = –40°C to +85°C 2.2
To negative rail,
RL = 2kΩ to 1.35V		 0.07 0.2
TJ = –40°C to +85°C 0.4
To positive rail,
RL = 600Ω to 1.35V		 2.0 2.5
TJ = –40°C to +85°C 1.8
To negative rail,
RL = 600Ω to 1.35V		 0.2 0.5
TJ = –40°C to +85°C 0.7
To positive rail,
V+ = 15V, RL = 2kΩ to 7.5V		 14.2 14.8
TJ = –40°C to +85°C 13.5
To negative rail,
V+ = 15V, RL = 2kΩ to 7.5V		 0.12 0.4
TJ = –40°C to +85°C 0.5
To positive rail,
V+ = 15V, RL = 600Ω to 7.5V		 13.5 14.5
TJ = –40°C to +85°C 13.0
To negative rail,
V+ = 15V, RL = 600Ω to 7.5V		 0.36 1.25
TJ = –40°C to +85°C 1.50
ISC Short-circuit current Sourcing,
VOUT = 0V		 4 8 mA
TJ = –40°C to +85°C 3
Sinking,
VOUT = 2.7V		 3 5
TJ = –40°C to +85°C 2
POWER SUPPLY
IQ Quiescent current        LMC6035,
VOUT = 1.5V		 0.65 1.6 mA
TJ = –40°C to +85°C 1.9
LMC6036,
VOUT = 1.5V		 1.3 2.7
TJ = –40°C to +85°C 3.0
(1) Specified by design.
(2) Number specified is the slower of the positive and negative slew rates.