SNOS630E August   2000  – February 2024 LMC6081 , LMC6082 , LMC6084

PRODUCTION DATA  

  1.   1
  2. 1Features
  3. 2Applications
  4. 3Description
  5. 4Pin Configuration and Functions
  6. 5Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information LMC6081
    5. 5.5 Thermal Information LMC6082
    6. 5.6 Thermal Information LMC6084
    7. 5.7 Electrical Characteristics
    8. 5.8 Typical Characteristics
  7. 6Application and Implementation
    1. 6.1 Application Information
      1. 6.1.1 Amplifier Topology
      2. 6.1.2 Compensating for Input Capacitance
      3. 6.1.3 Capacitive Load Tolerance
      4. 6.1.4 Latch-Up
    2. 6.2 Typical Applications
      1. 6.2.1 Typical Single-Supply Applications
      2. 6.2.2 Instrumentation Amplifier
    3. 6.3 Layout
      1. 6.3.1 Layout Guidelines
        1. 6.3.1.1 Printed Circuit Board Layout for High-Impedance Work
  8. 7Device and Documentation Support
    1. 7.1 Receiving Notification of Documentation Updates
    2. 7.2 Support Resources
    3. 7.3 Trademarks
    4. 7.4 Electrostatic Discharge Caution
    5. 7.5 Glossary
  9. 8Revision History
  10. 9Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • Y|0
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.8 Typical Characteristics

at TA = 25°C, VS = ±7.5V, VOUT = mid-supply, and RL≥ 1MΩ (unless otherwise specified)

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TA = 25°C
Figure 5-1 Distribution of LMC6082 Input Offset Voltage
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Figure 5-3 Input Bias Current vs Common-Mode Voltage
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Figure 5-5 Supply Current vs Supply Voltage
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Figure 5-7 Input Offset Voltage vs Common Mode Voltage
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Figure 5-9 Power Supply Rejection Ratio vs Frequency
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Figure 5-11 Output Characteristics Sourcing Current
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Figure 5-13 Gain and Phase Response vs Temperature
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RL = 500kΩ
Figure 5-15 Gain and Phase Response vs Capacitive Load
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Figure 5-17 Inverting Small-Signal Pulse Response
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Figure 5-19 Noninverting Small-Signal Pulse Response
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Figure 5-21 Crosstalk Rejection vs Frequency
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RL = 1MΩ
Figure 5-23 Stability vs Capacitive Load
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Figure 5-2 Input Bias Current vs Temperature
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Figure 5-4 Input Bias Current vs Common-Mode Voltage
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Figure 5-6 Input Voltage vs Output Voltage
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Figure 5-8 Common Mode Rejection Ratio vs Frequency
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Figure 5-10 Input Voltage Noise vs Frequency
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Figure 5-12 Output Characteristics Sinking Current
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RL = 600Ω
Figure 5-14 Gain and Phase Response vs Capacitive Load
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Figure 5-16 Open-Loop Frequency Response
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Figure 5-18 Inverting Large-Signal Pulse Response
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Figure 5-20 Noninverting Large-Signal Pulse Response
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RL = 600Ω
Figure 5-22 Stability vs Capacitive Load