SNOS724F August   2000  – February 2024 LMC6492 , LMC6494

PRODUCTION DATA  

  1.   1
  2. 1Features
  3. 2Applications
  4. 3Description
  5. 4Pin Configuration and Functions
  6. 5Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6Application and Implementation
    1. 6.1 Application Information
      1. 6.1.1 Input Common-Mode Voltage Range
      2. 6.1.2 Rail-to-Rail Output
      3. 6.1.3 Compensating for Input Capacitance
      4. 6.1.4 Capacitive Load Tolerance
    2. 6.2 Typical Application
      1. 6.2.1 Application Circuits
    3. 6.3 Layout
      1. 6.3.1 Layout Guidelines
        1. 6.3.1.1 Printed Circuit Board Layout For High-Impedance Work
  8. 7Device and Documentation Support
    1. 7.1 Device Support
      1. 7.1.1 Development Support
        1. 7.1.1.1 Spice Macromodel
        2. 7.1.1.2 PSpice® for TI
        3. 7.1.1.3 TINA-TI™ Simulation Software (Free Download)
        4. 7.1.1.4 DIP-Adapter-EVM
        5. 7.1.1.5 DIYAMP-EVM
        6. 7.1.1.6 TI Reference Designs
        7. 7.1.1.7 Filter Design Tool
    2. 7.2 Receiving Notification of Documentation Updates
    3. 7.3 Support Resources
    4.     Trademarks
    5. 7.4 Electrostatic Discharge Caution
    6. 7.5 Glossary
  9. 8Revision History
  10. 9Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • D|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Thermal Information

THERMAL METRIC(1) LMC6492 LMC6494 UNIT
D (SOIC) D (SOIC)
8 PINS 14 PINS
RθJA Junction-to-ambient thermal resistance 128.9 83.0 ºC/W
RθJC(top) Junction-to-case(top) thermal resistance  68.6 42.7 ºC/W
RθJB Junction-to-board thermal resistance 72.4 42.4 ºC/W
ψJT Junction-to-top characterization parameter 19.7 7.0 ºC/W
ψJB Junction-to-board characterization parameter 71.6 42.0 ºC/W
RθJC(bot) Junction-to-case(bottom) thermal resistance N/A N/A ºC/W
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.