SNOS724F August   2000  – February 2024 LMC6492 , LMC6494

PRODUCTION DATA  

  1.   1
  2. 1Features
  3. 2Applications
  4. 3Description
  5. 4Pin Configuration and Functions
  6. 5Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6Application and Implementation
    1. 6.1 Application Information
      1. 6.1.1 Input Common-Mode Voltage Range
      2. 6.1.2 Rail-to-Rail Output
      3. 6.1.3 Compensating for Input Capacitance
      4. 6.1.4 Capacitive Load Tolerance
    2. 6.2 Typical Application
      1. 6.2.1 Application Circuits
    3. 6.3 Layout
      1. 6.3.1 Layout Guidelines
        1. 6.3.1.1 Printed Circuit Board Layout For High-Impedance Work
  8. 7Device and Documentation Support
    1. 7.1 Device Support
      1. 7.1.1 Development Support
        1. 7.1.1.1 Spice Macromodel
        2. 7.1.1.2 PSpice® for TI
        3. 7.1.1.3 TINA-TI™ Simulation Software (Free Download)
        4. 7.1.1.4 DIP-Adapter-EVM
        5. 7.1.1.5 DIYAMP-EVM
        6. 7.1.1.6 TI Reference Designs
        7. 7.1.1.7 Filter Design Tool
    2. 7.2 Receiving Notification of Documentation Updates
    3. 7.3 Support Resources
    4.     Trademarks
    5. 7.4 Electrostatic Discharge Caution
    6. 7.5 Glossary
  9. 8Revision History
  10. 9Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • D|14
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Input Common-Mode Voltage Range

Unlike Bi-FET amplifier designs, the LMC649x does not exhibit phase inversion when an input voltage exceeds the negative supply voltage. Figure 6-1 shows an input voltage exceeding both supplies with no resulting phase inversion on the output.

GUID-F37BB2C3-264C-4716-B4DD-1B386A6CB1EE-low.png Figure 6-1 Input Voltage Signal Exceeds the
LMC649x Power Supply Voltages With
No Output Phase Inversion

The LMC649x is a true rail-to-rail input operational amplifier with an input common-mode range that extends beyond either supply rail. When the input common-mode voltage swings to about 3V from the positive rail, some dc specifications, namely offset voltage, can be slightly degraded. Figure 6-2 illustrates the input offset behavior across the entire common-mode range.

GUID-20231109-SS0I-BPF5-PPTB-J7FWRDDL87PP-low.svg Figure 6-2 Input Offset Voltage vs Common-Mode Voltage

The absolute maximum input voltage is 300mV beyond either supply rail at room temperature. Voltages greatly exceeding this absolute maximum rating, as in Figure 6-3, can cause excessive current to flow in or out of the input pins possibly affecting reliability.

GUID-24AA3004-9D81-47EF-B842-919D57028107-low.png Figure 6-3 A ±7.5V Input Signal Greatly Exceeds the 5V Supply in Figure 6-3, Causing No Phase Inversion Due to RI

Applications that exceed this rating must externally limit the maximum input current to ±5mA with an input resistor (RI) as shown in Figure 6-4.

GUID-67C2C08A-ED0F-462F-9AC3-69345AB2372D-low.pngFigure 6-4 RI Input Current Protection for
Voltages Exceeding the Supply Voltages