SNOSD12D
November 2018 – January 2019
LMG1210
PRODUCTION DATA.
1
Features
2
Applications
3
Description
Device Images
Simplified Typical Application
4
Revision History
5
Pin Configuration and Functions
Pin Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Switching Characteristics
6.7
Typical Characteristics
6.8
Timing Diagrams
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
Bootstrap Diode Operation
7.3.2
LDO Operation
7.3.3
Dead Time Selection
7.3.4
Overtemperature Protection
7.3.5
High-Performance Level Shifter
7.3.6
Negative HS Voltage Handling
7.4
Device Functional Modes
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
Design Requirements
8.2.2
Detailed Design Procedure
8.2.2.1
Bypass Capacitor
8.2.2.2
Bootstrap Diode Selection
8.2.2.3
Handling Ground Bounce
8.2.2.4
Independent Input Mode
8.2.2.5
Computing Power Dissipation
8.2.3
Application Curves
8.3
Do's and Don'ts
9
Power Supply Recommendations
10
Layout
10.1
Layout Guidelines
10.2
Layout Example
11
Device and Documentation Support
11.1
Documentation Support
11.1.1
Related Documentation
11.2
Receiving Notification of Documentation Updates
11.3
Community Resources
11.4
Trademarks
11.5
Electrostatic Discharge Caution
11.6
Glossary
12
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
RVR|19
Thermal pad, mechanical data (Package|Pins)
Orderable Information
snosd12d_oa
snosd12d_pm
8.2.3
Application Curves
Figure 19.
1-MHz, 80-V Operation
Figure 20.
10-MHz Operation, No Bus Voltage