SNOSD12D November   2018  – January 2019 LMG1210

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Simplified Typical Application
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
    8. 6.8 Timing Diagrams
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Bootstrap Diode Operation
      2. 7.3.2 LDO Operation
      3. 7.3.3 Dead Time Selection
      4. 7.3.4 Overtemperature Protection
      5. 7.3.5 High-Performance Level Shifter
      6. 7.3.6 Negative HS Voltage Handling
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Bypass Capacitor
        2. 8.2.2.2 Bootstrap Diode Selection
        3. 8.2.2.3 Handling Ground Bounce
        4. 8.2.2.4 Independent Input Mode
        5. 8.2.2.5 Computing Power Dissipation
      3. 8.2.3 Application Curves
    3. 8.3 Do's and Don'ts
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
  • RVR|19
Thermal pad, mechanical data (Package|Pins)
Orderable Information

3 Description

The LMG1210 is a 200-V, half-bridge MOSFET and Gallium Nitride Field Effect Transistor (GaN FET) driver designed for ultra-high frequency, high-efficiency applications that features adjustable deadtime capability, very small propagation delay, and 3.4-ns high-side low-side matching to optimize system efficiency. This part also features an internal LDO which ensures a gate-drive voltage of 5-V regardless of supply voltage.

To enable best performance in a variety of applications, the LMG1210 allows the designer to choose the optimal bootstrap diode to charge the high-side bootstrap capacitor. An internal switch turns the bootstrap diode off when the low side is off, effectively preventing the high-side bootstrap from overcharging and minimizing the reverse recovery charge. Additional parasitic capacitance across the GaN FET is minimized to less than 1 pF to reduce additional switching losses.

The LMG1210 features two control input modes: Independent Input Mode (IIM) and PWM mode. In IIM each of the outputs is independently controlled by a dedicated input. In PWM mode the two complementary output signals are generated from a single input and the user can adjust the dead time from 0 to 20 ns for each edge. The LMG1210 operates over a wide temperature range from –40°C to 125°C and is offered in a low-inductance WQFN package.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
LMG1210 WQFN (19) 3.00 mm × 4.00 mm
  1. For all available packages, see the orderable addendum at the end of the data sheet.