SNOSDI8 May   2024 LMG2650

ADVANCE INFORMATION  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics
  7. 6 Parameter Measurement Information
    1. 6.1 GaN Power FET Switching Parameters
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  GaN Power FET Switching Capability
      2. 7.3.2  Turn-On Slew-Rate Control
      3. 7.3.3  Current-Sense Emulation
      4. 7.3.4  Bootstrap Diode Function
      5. 7.3.5  Input Control Pins (EN, INL, INH, GDH)
      6. 7.3.6  INL - INH Interlock
      7. 7.3.7  AUX Supply Pin
        1. 7.3.7.1 AUX Power-On Reset
        2. 7.3.7.2 AUX Under-Voltage Lockout (UVLO)
      8. 7.3.8  BST Supply Pin
        1. 7.3.8.1 BST Power-On Reset
        2. 7.3.8.2 BST Under-Voltage Lockout (UVLO)
      9. 7.3.9  Overcurrent Protection
      10. 7.3.10 Overtemperature Protection
      11. 7.3.11 Fault Reporting
    4. 7.4 Device Functional Modes
  9. 8 Device and Documentation Support
    1. 8.1 Receiving Notification of Documentation Updates
    2. 8.2 Support Resources
    3. 8.3 Trademarks
    4. 8.4 Electrostatic Discharge Caution
    5. 8.5 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
  • RFB|19
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • 650V GaN power-FET half bridge
  • 95mΩ low-side and high-side GaN FETs
  • Integrated gate drivers with <100ns low propagation delays
  • Programmable turn-on slew rate control
  • Current-sense emulation with high-bandwidth and high accuracy
  • Low-side referenced (INH) and high-side referenced (GDH) high-side gate drive pins
  • Low-side (INL) / high-side (INH) gate-drive interlock
  • High-side (INH) gate-drive signal level shifter
  • Smart-switched bootstrap diode function
  • High-side start up : <8µs
  • Low-side / high-side cycle-by-cycle overcurrent protection
  • Overtemperature protection
  • AUX idle quiescent current: 250μA
  • AUX standby quiescent current: 50μA
  • BST idle quiescent current: 85μA
  • 8x6 mm QFN package with dual thermal pads