SNOSDA7F September 2020 – August 2024 LMG3422R030 , LMG3426R030 , LMG3427R030
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
The LMG342xR030 is a high-performance power GaN device with integrated gate driver. The GaN device offers zero reverse recovery and ultra-low output capacitance, which enables high efficiency in bridge-based topologies. Direct-drive architecture is applied to control the GaN device directly by the integrated gate driver. This architecture provides superior switching performance compared to the traditional cascode approach and helps solve a number of challenges in GaN applications.
The integrated driver ensures the device stays off for high drain slew rates. The integrated driver protects the GaN device from overcurrent, short-circuit, overtemperature, VDD undervoltage, and a high-impedance RDRV pin. The integrated driver is also able to sense the die temperature and send out the temperature signal through a modulated PWM signal. The LMG3426R030 has a zero-voltage detection (ZVD) feature that outputs a pulse signal on the ZVD pin when zero-voltage switching (ZVS) is detected . The LMG3427R030 includes the zero-current detection (ZCD) feature which provides a pulse output from the ZCD pin when a positive drain-to-source current is detected.
Unlike Si MOSFETs, GaN devices do not have a p-n junction from source to drain and thus have no reverse recovery charge. However, GaN devices still conduct from source to drain similar to a p-n junction body diode, but with higher voltage drop and higher conduction loss. Therefore, source-to-drain conduction time must be minimized while the LMG342xR030 GaN FET is turned off.