SNOSDI3
March 2024
LMG3425R030
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Pin Configuration and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Thermal Information
5.5
Electrical Characteristics
5.6
Switching Characteristics
5.7
Typical Characteristics
6
Parameter Measurement Information
6.1
Switching Parameters
6.1.1
Turn-On Times
6.1.2
Turn-Off Times
6.1.3
Drain-Source Turn-On Slew Rate
6.1.4
Turn-On and Turn-Off Switching Energy
6.2
Safe Operation Area (SOA)
6.2.1
Repetitive SOA
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
GaN FET Operation Definitions
7.3.2
Direct-Drive GaN Architecture
7.3.3
Drain-Source Voltage Capability
7.3.4
Internal Buck-Boost DC-DC Converter
7.3.5
VDD Bias Supply
7.3.6
Auxiliary LDO
7.3.7
Fault Protection
7.3.7.1
Overcurrent Protection and Short-Circuit Protection
7.3.7.2
Overtemperature Shutdown Protection
7.3.7.3
UVLO Protection
7.3.7.4
High-Impedance RDRV Pin Protection
7.3.7.5
Fault Reporting
7.3.8
Drive-Strength Adjustment
7.3.9
Temperature-Sensing Output
7.3.10
Ideal-Diode Mode Operation
7.3.10.1
Operational Ideal-Diode Mode
7.3.10.2
Overtemperature-Shutdown Ideal-Diode Mode
7.4
Start-Up Sequence
7.5
Device Functional Modes
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
Design Requirements
8.2.2
Detailed Design Procedure
8.2.2.1
Slew Rate Selection
8.2.2.2
Signal Level-Shifting
8.2.2.3
Buck-Boost Converter Design
8.2.3
Application Curves
8.3
Do's and Don'ts
8.4
Power Supply Recommendations
8.4.1
Using an Isolated Power Supply
8.4.2
Using a Bootstrap Diode
8.4.2.1
Diode Selection
8.4.2.2
Managing the Bootstrap Voltage
8.5
Layout
8.5.1
Layout Guidelines
8.5.1.1
Solder-Joint Reliability
8.5.1.2
Power-Loop Inductance
8.5.1.3
Signal-Ground Connection
8.5.1.4
Bypass Capacitors
8.5.1.5
Switch-Node Capacitance
8.5.1.6
Signal Integrity
8.5.1.7
High-Voltage Spacing
8.5.1.8
Thermal Recommendations
8.5.2
Layout Examples
9
Device and Documentation Support
9.1
Documentation Support
9.1.1
Related Documentation
9.2
Receiving Notification of Documentation Updates
9.3
Support Resources
9.4
Trademarks
9.5
Electrostatic Discharge Caution
9.6
Export Control Notice
9.7
Glossary
10
Revision History
11
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
RQZ|54
Thermal pad, mechanical data (Package|Pins)
Orderable Information
snosdi3_oa
snosdi3_pm
5.7
Typical Characteristics
Figure 5-1
Drain-Current Turn-On Delay Time vs Drive-Strength Resistance
Figure 5-3
Turn-On Rise Time vs Drive-Strength Resistance
Figure 5-5
Drain Current vs Drain-Source Voltage
Figure 5-7
Normalized On-Resistance vs Junction Temperature
VDD = 12V
T
J
= 25°C
Figure 5-9
VDD Supply Current vs IN Switching Frequency
Figure 5-11
Half-Bridge Switching Energy vs Inductive Load Current
Figure 5-2
Turn-On Delay Time vs Drive-Strength Resistance
Figure 5-4
Turn-On Slew Rate vs Drive-Strength Resistance
IN = 0V
Figure 5-6
Off-State Source-Drain Voltage vs Source Current
Figure 5-8
Output Capacitance vs Drain-Source Voltage
VDD = 12V
T
J
= 125°C
Figure 5-10
VDD Supply Current vs IN Switching Frequency
Figure 5-12
Repetitive Safe Operation Area