The zero-voltage switching (ZVS) converters are widely used to improve the power converter’s efficiency. However, in those soft-switching topologies like LLC and triangular current mode (TCM) totem pole PFC, the device can lose ZVS depending on the load condition, inductor, magnetic parameters and control techniques, which affects the system efficiency. To insure ZVS, certain design margins or additional circuits are needed which sacrifices the converter performance and adds components.

To simplify the system design for soft-switching converters, LMG3526R030 part integrates a zero-voltage detection (ZVD) circuit that provides a digital feedback signal to indicate if the device has achieved ZVS in the current switching cycle. The circuit diagram is shown in Figure 7-7. When the IN pin signal goes high, the logic circuit checks if the device’s V_DS has reached below 0 V to determine whether the device has achieved zero voltage switching in this switching cycle. Once a ZVS is identified, a pulse-output with a width of T_{WD_ZVD} will be sent out from the ZVD pin after a delay time of T_{DL_ZVD} as indicated in Figure 6-3. Note a certain third quadrant conduction time is required to allow the device detecting a zero-voltage switching, and T_{3rd_ZVD} is a function of the gate driver strength.

Figure 7-7 Circuit Diagram for Zero-Voltage Detection Circuit Block Diagram

The timings of the ZVD output corresponding to a continuous conduction mode Buck converter is show in Figure 7-8, and the purpose is to demonstrate how ZVD function works in both hard-switching and soft-switching conditions. The load current going out of the switch node is defined as positive. In CCM buck operation, the high-side the hard-switching device while the low-side device can achieve zero-voltage switching with a proper dead-time settings. In the first switching cycle when low-side GaN IN pin rises, the switch-node voltage V_DS has dropped below zero and stays in third quadrant conduction for a period of T₁. Since this third quadrant conduction time T₁ is larger than the detection time T_{3rd_ZVD} specified in electrical characteristic table, a zero-voltage switching is identified and the ZVD pin outputs a pulse signal to indicate that, and the pulse width of the ZVD pulse is also defined in the electrical characteristic table as T_WD. In the second switching cycle, the device is turned on earlier, and the third quadrant conduction time T₂ is less than T_{3rd_ZVD}. In this case, the ZVD signal stays low though the device has achieved ZVS. In the third switching cycle, the IN pin signal is advanced even earlier, and the device is in partial hard-switching. Accordingly, the ZVD output stays low in this case. Note the high side ZVD output stays low in this CCM buck operation as it always has hard-switching.

Figure 7-8 ZVD Function in a CCM Buck Converter

The ZVD function can facilitate the control in soft-switching topology, to illustrate it, the ZVD waveforms in a TCM totem pole PFC is shown in Figure 7-9. In this diagram, the positive cycle is considered with V_IN > 0.5 V_OUT, and the load current going into the switch node is defined as positive. In the first switching cycle, the load current builds enough negative current, and the low-side device achieves ZVS with a clear third quadrant conduction time beyond T_{3rd_DET}. Therefore, the ZVD outputs a pulse signal and provide the ZVS information back. The ZVD pulses are missing in the next two switching cycles because the third quadrant conduction time becomes shorter in second cycle and the device actual loses ZVS in the third cycle.

Figure 7-9 ZVD Function in a TCM TP PFC Converter