SNOSDL9 December   2024 LMG5126

ADVANCE INFORMATION  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Device Configuration
      2. 6.3.2 Switching Frequency and Synchronization (SYNCIN)
      3. 6.3.3 Dual Random Spread Spectrum (DRSS)
      4. 6.3.4 Operation Modes (BYPASS, DEM, FPWM)
    4. 6.4 Device Functional Modes
      1. 6.4.1 Shutdown State
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Feedback Compensation
    2. 7.2 Typical Application
      1. 7.2.1 Application
      2. 7.2.2 Design Requirements
      3. 7.2.3 Detailed Design Procedure
        1. 7.2.3.1 Determining the Duty Cycle
        2. 7.2.3.2 Timing Resistor RT
        3. 7.2.3.3 Vout Programming
        4. 7.2.3.4 Inductor Selection Lm
        5. 7.2.3.5 Output Capacitor Cout
      4. 7.2.4 Application Curves
        1. 7.2.4.1 Efficiency
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Receiving Notification of Documentation Updates
    2. 8.2 Support Resources
    3. 8.3 Trademarks
    4. 8.4 Electrostatic Discharge Caution
    5. 8.5 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information
    1. 10.1 Package Option Addendum
    2. 10.2 Tape and Reel Information
    3. 10.3 Mechanical Data

Package Options

Mechanical Data (Package|Pins)
  • VBT|22
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.3.2 Switching Frequency and Synchronization (SYNCIN)

The switching frequency of 300kHz to 2.5MHz is set by the RT resistor connected between the RT-pin and AGND. The RT resistor must be selected between 12kΩ and 100kΩ according to Figure 6-1. If configured to use an external clock the device can synchronize the switching frequency to an external clock applied at the SYNCIN-pin. For single device configuration within ±50% of the set frequency by the RT-pin, in multi device configuration within ±25%. The internal clock is synchronized at the rising edge of the external clock signal applied at the SYNCIN-pin. The CFG1-pin Spread Spectrum setting is ignored during frequency synchronization and clock dithering is disabled.

The device always starts with the internal clock and starts synchronizing to an applied external clock during the START PHASE and the ACTIVE state (see ). The device synchronizes to the external clock as soon as the clock is applied and switches back to the internal clock in case the external clock stops.

Equation 1. FSW= 1RRT×s31.5 GΩ+18 ns
Equation 2. RRT=1FSW-18 ns×31.5GΩs
LMG5126 Clock Synchronization Figure 6-1 Clock Synchronization