SNOSDL9 December   2024 LMG5126

ADVANCE INFORMATION  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Device Configuration
      2. 6.3.2 Switching Frequency and Synchronization (SYNCIN)
      3. 6.3.3 Dual Random Spread Spectrum (DRSS)
      4. 6.3.4 Operation Modes (BYPASS, DEM, FPWM)
    4. 6.4 Device Functional Modes
      1. 6.4.1 Shutdown State
  8. Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Feedback Compensation
    2. 7.2 Typical Application
      1. 7.2.1 Application
      2. 7.2.2 Design Requirements
      3. 7.2.3 Detailed Design Procedure
        1. 7.2.3.1 Determining the Duty Cycle
        2. 7.2.3.2 Timing Resistor RT
        3. 7.2.3.3 Vout Programming
        4. 7.2.3.4 Inductor Selection Lm
        5. 7.2.3.5 Output Capacitor Cout
      4. 7.2.4 Application Curves
        1. 7.2.4.1 Efficiency
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. Device and Documentation Support
    1. 8.1 Receiving Notification of Documentation Updates
    2. 8.2 Support Resources
    3. 8.3 Trademarks
    4. 8.4 Electrostatic Discharge Caution
    5. 8.5 Glossary
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information
    1. 10.1 Package Option Addendum
    2. 10.2 Tape and Reel Information
    3. 10.3 Mechanical Data

Package Options

Mechanical Data (Package|Pins)
  • VBT|22
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Features

  • Input voltage 6.5V to 42V
    • Minimum 2.5V for V(BIAS) ≥ 6.5V or VOUT ≥ 6V
  • Output Voltage 6V to 60V
    • 2% accuracy, internal feedback resistors
    • Bypass operation for VI > VOUT
      • Boot refresh out of audio >20kHz
    • Dynamic output voltage tracking
      • Digital PWM tracking (DTRK)
      • Analog tracking (ATRK)
    • Over voltage protection (65V, 50V, 35V, 25V)
  • Low shutdown ISD of 50μA typ. (200uA max.)
  • Low operating IQ of 1.1mA typ. (2.5mA max.)
  • Stacking with interleaved multiphase operation
    • Up to 4-devices without external clock
  • Switching frequency from 300kHz to 2.5MHz
    • Syncronization to external clock (SYNCIN)
    • Spread Spectrum (DRSS)
  • Dynamically selectable switching modes (FPWM, Diode emulation)
  • Current sense resistor or DCR sensing
  • Average inductor current monitor
  • Average input current limit
  • Selectable current limit (30mV or 60mV)
  • Selectable delay time (DLY)
  • Power good indicator
  • Programmable VI undervoltage lockout (UVLO)
  • Lead-less RLF-22 package with wettable flanks