SNLS247H April 2007 – June 2016 LMH0302
PRODUCTION DATA.
NOTE
Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.
The LMH0302 is a single-channel SDI cable driver that supports different application spaces. The following sections describe the typical use cases and common implementation practices.
The SMPTE specifications define the use of AC-coupling capacitors for transporting uncompressed serial data streams with heavy low-frequency content. This specification requires the use of a 4.7-µF AC-coupling capacitor to avoid low frequency DC wander. The 75-Ω signal is also required to meet certain rise and fall timing to facilitate highest eye opening for the receiving device.
SMPTE specifies the requirements for the Serial Digital Interface to transport digital video at SD, HD, 3 Gbps, and higher data rates over coaxial cables. One of the requirements is meeting the required return loss. This requirement specifies how closely the port resembles 75-Ω impedance across a specified frequency band. Output return loss is dependent on board design. The LMH0302 supports these requirements.
For the LMH0302 design example, Table 1 lists the design parameters.
PARAMETER | REQUIREMENT |
---|---|
Input termination | Required; 49.9 Ω are recommended (see Figure 3). |
Output AC-coupling capacitors | Required; both SDO and SDO require AC-coupling capacitors. SDO AC-coupling capacitors are expected to be 4.7 µF to comply with SMPTE wander requirement. |
DC power supply coupling capacitors | To minimize power supply noise, place 0.1-µF capacitor as close to the device VCC pin as possible. |
Distance from device to BNC | Keep this distance as short as possible. |
High speed SDI and SDI trace impedance | Design differential trace impedance of SDI and SDI with 100 Ω. |
High speed SDO and SDO trace impedance | Single-ended trace impedance for SDO and SDO with 75 Ω. |
The following design procedure is recommended: