SNLS285H April   2008  – May 2016 LMH0303

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics - DC
    6. 6.6 Electrical Characteristics - AC
    7. 6.7 Timing Requirements
    8. 6.8 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Loss-of-Signal Detector
      2. 7.3.2 Input Interfacing
      3. 7.3.3 Output Interfacing
      4. 7.3.4 Output Slew Rate Control
      5. 7.3.5 Cable Fault Detection
      6. 7.3.6 SMBus Interface
        1. 7.3.6.1 Transfer of Data through the SMBus
        2. 7.3.6.2 SMBus Transactions
          1. 7.3.6.2.1 Writing a Register
          2. 7.3.6.2.2 Reading a Register
        3. 7.3.6.3 Communicating With Multiple LMH0303 Cable Drivers through the SMBus
    4. 7.4 Device Functional Modes
    5. 7.5 Register Maps
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 General Guidance for All Applications
      2. 8.1.2 Cable Fault Detection Operation
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Community Resources
    2. 11.2 Trademarks
    3. 11.3 Electrostatic Discharge Caution
    4. 11.4 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
Supply voltage –0.5 3.6 V
Input voltage (all inputs) –0.3 VCC + 0.3 V
Output current 28 mA
Lead temperature (soldering, 4 s) 260 °C
Junction temperature 125 °C
Storage temperature, Tstg –65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±8000 V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±2000
Machine model (MM) ±400
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. Pins listed as
±8000 V may actually have higher performance.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. Pins listed as
±2000 V may actually have higher performance.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
Supply voltage (VCC – VEE) 3.13 3.3 3.46 V
Operating junction temperature 100 °C
Operating free air temperature, TA –40 25 85 °C

6.4 Thermal Information

THERMAL METRIC(1) LMH0303 UNIT
RUM (WQFN)
16 PINS
RθJA Junction-to-ambient thermal resistance 40.7 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 39.5 °C/W
RθJB Junction-to-board thermal resistance 18.5 °C/W
ψJT Junction-to-top characterization parameter 0.6 °C/W
ψJB Junction-to-board characterization parameter 18.5 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance 8 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.

6.5 Electrical Characteristics – DC

Over supply voltage and operating temperature ranges (unless otherwise noted)(1)(2)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VCMIN Input common mode voltage SDI, SDI 1.6 + VSDI/2 VCC – VSDI/2 V
VSDI Input voltage swing Differential (SDI, SDI) 100 2200 mVP−P
VCMOUT Output common mode voltage SDO, SDO VCC – VSDO V
VSDO Output voltage swing (SDO, SDO) Single-ended, 75-Ω load,
RREF = 750 Ω 1%		 720 800 880 mVP-P
VIH Input voltage high level SD/HD, ENABLE 2 V
VIL Input voltage low level SD/HD, ENABLE 0.8 V
ICC Supply current SD/HD = 0,
SDO/SDO enabled		 47 57 mA
SD/HD = 1,
SDO/SDO enabled		 40 47
SDO/SDO disabled 1.3 2.5
SMBUS DC SPECIFICATIONS
VSIL Data, clock input low voltage 0.8 V
VSIH Data, clock input high voltage 2.1 VSDD V
ISPULLUP Current through pullup resistor
or current source		 VOL = 0.4 V 4 mA
VSDD Nominal bus voltage 3 3.6 V
ISLEAKB Input leakage per bus segment(3) –200 200 µA
ISLEAKP Input leakage per pin –10 10 µA
CSI Capacitance for SDA and SCL(3)(4) 10 pF
(1) Current flow into device pins is defined as positive. Current flow out of device pins is defined as negative. All voltages are stated referenced to VEE = 0 V.
(2) Typical values are stated for VCC = 3.3 V and TA = 25°C.
(3) Recommended value — Parameter not tested.
(4) Recommended maximum capacitive load per bus segment is 400 pF.

6.6 Electrical Characteristics – AC

Over supply voltage and operating temperature ranges (unless otherwise noted)(1)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
DRSDI Input data rate 2970 Mbps
Tjit Additive output jitter 2.97 Gbps 20 psP-P
1.485 Gbps 18
270 Mbps 15
tr,tf Output rise time and fall time SD/HD = 0, 20% to 80% 90 130 ps
SD/HD = 1, 20% to 80% 400 800
TMATCH Mismatch in rise or fall time SD/HD = 0 30 ps
SD/HD = 1 50
TDCD Duty cycle distortion SD/HD = 0, 2.97 Gbps(2) 27 ps
SD/HD = 0, 1.485 Gbps(2) 30
SD/HD = 1(2) 100
TOS Output overshoot SD/HD = 0(2) 10%
SD/HD = 1(2) 8%
RLSDO Output return loss 5 MHz to 1.5 GHz(3) 15 dB
1.5 GHz to 3 GHz(3) 10
(1) Typical values are stated for VCC = 3.3 V and TA = 25°C.
(2) Specification is ensured by characterization.
(3) Output return loss is dependent on board design. The LMH0303 meets this specification on the SD303EVK evaluation board.

6.7 Timing Requirements

MIN NOM MAX UNIT
fSMB Bus operating frequency 10 100 kHz
tBUF Bus free time between stop and start condition 4.7 µs
tHD:STA Hold time after (repeated) start condition.
After this period, the first clock is generated; at ISPULLUP = MAX 		4 µs
tSU:STA Repeated start condition setup time 4.7 µs
tSU:STO Stop condition setup time 4 µs
tHD:DAT Data hold time 300 ns
tSU:DAT Data setup time 250 ns
tLOW Clock low period 4.7 µs
tHIGH Clock high period 4 50 µs
tF Clock or data fall time 300 ns
tR Clock or data rise time 1000 ns
tPOR Time in which device must be operational after power on 500 ms
LMH0303 30043206.gif Figure 1. SMBus Timing Parameters

6.8 Typical Characteristics

Typical device characteristics at TA = 25°C and VCC = 3.3 V (unless otherwise noted)
LMH0303 lmh0303_3g_sdo.gif Figure 2. SDO PRBS10 at 2.97 Gbps
LMH0303 lmh0303_hd_sdo.gif Figure 3. SDO PRBS10 at 1.485 Gbps