SNLS233O April 2007 – July 2015 LMH0344
PRODUCTION DATA.
PIN | I/O | DESCRIPTION | |
---|---|---|---|
NAME | WQFN | ||
AEC+ | 5 | I/O, Analog | AEC loop filter external capacitor (1-µF) positive connection. |
AEC- | 6 | I/O, Analog | AEC loop filter external capacitor (1-µF) negative connection. |
BYPASS | 7 | I, LVCMOS | Bypasses equalization and DC restoration when high. No equalization occurs in this mode. This pin does not have an internal pulldown. If the bypass function is not used, this pin requires an external pulldown resistor to disable bypass. |
CD | 15 | O, LVCMOS | Carrier detect. CD is high when no signal is present. CD has no function in BYPASS mode. |
MUTE | 14 | I, LVCMOS | Output mute. To disable the mute function and enable the output, MUTE must be tied to GND or a low level signal. To force the outputs to a muted state, tie to VCC. CD may be tied to this pin to inhibit the output when no input signal is present. MUTE has no function in BYPASS mode. |
MUTEREF | 8 | I, Analog | Mute reference. Sets the threshold for CD and (with CD tied to MUTE) determines the maximum cable to be equalized before muting. MUTEREF may be either unconnected or connected to ground for maximum equalization. |
NC | — | — | No connect. |
SDI | 2 | I, Analog | Serial data true input. |
SDI | 3 | I,Analog | Serial data complement input. |
SDO | 11 | O, Analog | Serial data true output. |
SDO | 10 | O, Analog | Serial data complement output. |
VCC | 13 | Power | Positive power supply (+3.3V). |
16 | |||
VEE | DAP | Ground | Negative power supply (ground). Note Figure 7 for layout example. |
1 | |||
4 | |||
9 | |||
12 |