SNOSDC1 June 2024 LMH1229
ADVANCE INFORMATION
The LMH1229 pinout and footprint is compatible with the LMH1297 (12G-SDI Bidirectional I/O with Integrated Reclocker) when the LMH1297 is used in EQ mode. This pin compatibility enables an easy upgrade path for improved SDI cable reach performance. A summary of pinout differences is shown in Figure 7-1.
Legend |
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No special provisions needed |
Minor pin setting differences |
Major pin setting and definition differences |
For a detailed comparison of device pin functionality, refer to Table 7-1.
PIN NO. | LMH1229 | LMH1297 | DIFFERENCE SUMMARY(1) |
---|---|---|---|
1 | SDI_IN+ | SDI_IO+ | None |
2 | SDI_IN- | SDI_IO- | |
8 | SDI_OUT+ | SDI_OUT+ | None |
7 | SDI_OUT- | SDI_OUT- | |
23 | OUT0+ | OUT0+ | None |
22 | OUT0- | OUT0- | |
19 | OUT1+ | IN0+ | LMH1229: Secondary 100Ω PCB output. LMH1297: Don't care. Pins are unused in EQ mode. For pin compatible functionality: Leave floating. |
18 | OUT1- | IN0- | |
4 | LOOP_BW_SEL | OUT0_SEL | LMH1229: 4-level CDR loop bandwidth control. LMH1297: Don't care. OUT0 always enabled in EQ mode. For pin compatible functionality: Leave floating (Level F). |
5 | OUT_MUX_SEL | EQ/CD_SEL | LMH1229: 4-level output mux select control. LMH1297: Tie low for EQ mode For pin compatible functionality: Tie low for 100Ω OUT0 PCB output only. |
9 | VOD_DE | HOST_EQ0 | None |
12 | MODE_SEL | MODE_SEL | LMH1229: Level H forces Power save mode (SPI enabled). LMH1297: Level H reserved. For pin compatible functionality: Use Levels F, R, or L only. |
14 | SDI_OUT_SEL | SDI_OUT_SEL | None |
15 | LF+ | RSV2 | LMH1229: Optional external loop filter cap (do not connect for
default operation). LMH1297: Reserved (do not connect). For pin compatible functionality: Leave floating. |
16 | LF- | RSV3 | |
17 | OUT_CTRL | OUT_CTRL | LMH1229: Selects bypass mode operation for OUT0, OUT1, and SDI_OUT. LMH1297: Selects bypass mode operation for OUT0 only For pin compatible functionality: Leave floating (Level F). |
24 | SDI_VOD | SDI_VOD | None |
27 | LOCK_N | LOCK_N | None |
32 | ENABLE | ENABLE | None |
11 | CS_N_ADDR0 | SS_N_ADDR0 | None Note: There are differences in LMH1229 vs. LMH1297 SMBus mode device addresses. |
28 | POCI_ADDR1 | MISO_ADDR1 | None Note: There are differences in LMH1229 vs. LMH1297 SMBus mode device addresses. |
13 | PICO_SDA | MOSI_SDA | None |
29 | SCK_SCL | SCK_SCL | None |
10 | RSV1 | RSV1 | None |
25 | RSV2 | RSV4 | None |
26 | RSV3 | RSV5 | None |
3, 6, 20 | VSS | VSS | None |
30 | VIN | VIN | None |
21 | VIN | VDD_CDR | None. Connect to same supply as Pin 30 (VIN) externally. |