SNOSDC1 June 2024 LMH1229
ADVANCE INFORMATION
The LMH12x9 supports SPI daisy-chaining among multiple devices, as shown in Figure 6-9.
Each LMH12x9 device is directly connected to the SCK and CS_N pins of the host. The first LMH12x9 device in the chain is connected to the host’s PICO pin, and the last device in the chain is connected to the host’s POCI pin. The PICO pin of each intermediate LMH12x9 device in the chain is connected to the POCI pin of the previous LMH12x9 device, thereby creating a serial shift register. In a daisy-chain configuration of N × LMH12x9 devices, the host conceptually sees a shift register of length 17 × N for a basic SPI transaction, during which CS_N is asserted low for 17 × N clock cycles.