SBOSAF0A april   2023  – august 2023 LMH32401-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics: Gain = 2 kΩ
    6. 6.6 Electrical Characteristics: Gain = 20 kΩ
    7. 6.7 Electrical Characteristics: Both Gains
    8. 6.8 Electrical Characteristics: Logic Threshold and Switching Characteristics
    9. 6.9 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Switched Gain Transimpedance Amplifier
      2. 7.3.2 Clamping and Input Protection
      3. 7.3.3 ESD Protection
      4. 7.3.4 Differential Output Stage
    4. 7.4 Device Functional Modes
      1. 7.4.1 Ambient Light Cancellation (ALC) Mode
      2. 7.4.2 Power-Down Mode (Multiplexer Mode)
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Development Support
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.8 Electrical Characteristics: Logic Threshold and Switching Characteristics

at VDD = 3.3 V, VOCM = Open, VOD = 0 V, CPD (1) = 1 pF, EN = 0 V, VGAIN = 0 V or 3.3 V, IDC_EN = 3.3 V, RL = 100 Ω, and
TA = 25℃. (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
LOGIC THRESHOLD PERFORMANCE
High-gain enable, threshold voltage Enabled when greater than this voltage 1.8 2 V
Low-gain enable, threshold voltage Enabled when less than this voltage 0.8 1 V
EN control, disable threshold voltage Disabled when greater than this voltage 1.8 2 V
EN control, enable threshold voltage Enabled when less than this voltage 0.8 1 V
IDC_EN control, disable threshold voltage Disabled when greater than this voltage 1.8 2 V
IDC_EN control, enable threshold voltage Enabled when less than this voltage 0.8 1 V
GAIN CONTROL TRANSIENT PERFORMANCE
High-gain to low-gain transition time,
(1% settling)		 Ambient loop disabled, fIN = 25 MHz,
VOUT = 1 VPP (initial condition), IDC = 0 µA		 90 ns
Low-gain to high-gain transition time,
(1% settling)		 Ambient loop disabled, fIN = 25 MHz,
VOUT = 1 VPP (final condition), IDC = 0 µA		 750 ns
High-gain to low-gain transition time,
(1% settling)		 Ambient loop enabled, fIN = 25 MHz,
VOUT = 1 VPP (initial condition),
IDC = 100 µA		 4 µs
Low-gain to high-gain transition time,
(1% settling)		 Ambient loop enabled, fIN = 25 MHz,
VOUT = 1 VPP (final condition), IDC = 100 µA		 4 µs
EN CONTROL TRANSIENT PERFORMANCE
Enable transition time (1% settling) Ambient loop disabled, fIN = 25 MHz,
VOUT = 1 VPP, IDC = 0 µA, gain = 2 kΩ		 125 ns
Disable transition time (1% settling) Ambient loop disabled, fIN = 25 MHz,
VOUT = 1 VPP, IDC = 0 µA, gain = 2 kΩ		 3 ns
Enable transition time (1% settling) Ambient loop disabled, fIN = 25 MHz,
VOUT = 1 VPP, IDC = 0 µA, gain = 20 kΩ		 850 ns
Disable transition time (1% settling) Ambient loop disabled, fIN = 25 MHz,
VOUT = 1 VPP, IDC = 0 µA, gain = 20 kΩ		 3 ns
Enable transition time (1% settling) Ambient loop enabled, fIN = 25 MHz,
VOUT = 1 VPP, IDC = 100 µA, gain = 2 kΩ		 10 µs
Disable transition time (1% settling) Ambient loop enabled, fIN = 25 MHz,
VOUT = 1 VPP, IDC = 100 µA, gain = 20 kΩ		 3.5 ns
Enable transition time (1% settling) Ambient loop enabled, fIN = 25 MHz,
VOUT = 1 VPP, IDC = 100 µA, gain = 20 kΩ		 4 µs
Disable transition time (1% settling) Ambient loop enabled, fIN = 25 MHz,
VOUT = 1 VPP, IDC = 100 µA, gain = 2 kΩ		 3 ns
(1) Input capacitance of photodiode.