SBOSA56C March   2022  – October 2023 LMH34400

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Electrical Characteristics: Logic Threshold and Switching Characteristics
    7. 5.7 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Clamping and Input Protection
      2. 6.3.2 ESD Protection
      3. 6.3.3 Single-Ended Output Stage
    4. 6.4 Device Functional Modes
      1. 6.4.1 Ambient Light Cancellation Mode
      2. 6.4.2 Power-Down Mode (Multiplexer Mode)
  8. Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Applications
      1. 7.2.1 LMH34400 Test Circuit
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
        3. 7.2.1.3 Application Curves
      2. 7.2.2 LMH34400 Signal Chain With Comparator
        1. 7.2.2.1 Design Requirements
        2. 7.2.2.2 Detailed Design Procedure
        3. 7.2.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DRL|6
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Application Information

The high gain and single-ended output of the LMH34400 is designed to be used in connection with a time-to-digital converter (TDC) for a time-of-flight (ToF) based receiver in a LIDAR system. The TDC function can be implemented using a stand-alone TDC or using a FPGA. ToF receive circuits that use TDC are significantly less expensive and consume considerably less power when compared to an analog-to-digital converter (ADC) based solution. The output of the LMH34400 presents an analog representation of the returned light pulse. Common practice uses a time-discriminator circuit before the TDC to precisely use a deterministic portion of the returned waveform to stop the TDC. The most straightforward method to accomplish this action is called leading-edge discrimination. This method uses a high-speed comparator with a low propagation delay to stop the TDC when the waveform crosses a chosen incoming light amplitude value.

In many applications, the amplitude of the returned pulse can vary considerably as a result of the difference in target reflectivity or simply the light source spreading out to a target moving to longer distances. For this reason, choose a comparator with low dispersion. If the dispersion is high, then the amplitude variation in the returned signal is converted to a variation in the timing signal presented to the TDC. This behavior is known as a walk error. Figure 7-1 shows the LMH34400 connected to the TLV3601 high-speed comparator. In this configuration, an incoming optical pulse sources current out of the amplifier input pin and delivers a proportional voltage pulse to the comparator input. The amplifier output has 1.0‑V dc with no input current; therefore, set the reference voltage of the comparator to a level greater than 1.0 V. For example, to have the comparator change states when the input is greater than 10 μA, then set the VREF voltage to 1.0 V + (40 kΩ × 10 μA) = 1.4 V.

GUID-20220225-SS0I-JB21-X9Z7-L4BN6XGNSKTF-low.svg Figure 7-1 LMH34400 to Interface to Comparator and TDC