SBOSA56C March   2022  – October 2023 LMH34400

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Electrical Characteristics: Logic Threshold and Switching Characteristics
    7. 5.7 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Clamping and Input Protection
      2. 6.3.2 ESD Protection
      3. 6.3.3 Single-Ended Output Stage
    4. 6.4 Device Functional Modes
      1. 6.4.1 Ambient Light Cancellation Mode
      2. 6.4.2 Power-Down Mode (Multiplexer Mode)
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Applications
      1. 7.2.1 LMH34400 Test Circuit
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
        3. 7.2.1.3 Application Curves
      2. 7.2.2 LMH34400 Signal Chain With Comparator
        1. 7.2.2.1 Design Requirements
        2. 7.2.2.2 Detailed Design Procedure
        3. 7.2.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DRL|6
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.5 Electrical Characteristics

at VDD = 3.3 V, CPD (1) = 1 pF, EN = 0 V, IDC_EN = 3.3 V, RL = 100 Ω (Output is AC-coupled for AC performance parameters; for DC performance parameters load is referenced to 1V), and TA = 25℃ (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
AC PERFORMANCE
SSBW Small-signal bandwidth VOUT = 100 mVPP 240 MHz
LSBW Large-signal bandwidth VOUT = 1 VPP 240 MHz
tR, tF Rise and fall time VOUT = 100 mVPP, pulse duration = 10 ns 1.5 ns
Slew rate (2) VOUT = 1 VPP, pulse duration = 10 ns 470 V/µs
Overload recovery time (1% settling) IIN = 10 mA, pulse duration = 10 ns 18 ns
Overload pulse extension (3) IIN = 10 mA, pulse duration = 10 ns 3 ns
eN Output noise density f = 10 MHz 94 nV/√Hz
iN Integrated input-referred noise f = DC to 250 MHz 50 nARMS
ZOUT Closed-loop output impedance f = 50 MHz 10 Ω
DC PERFORMANCE
Z21 Small-signal transimpedance gain (4) 33 40 46 kΩ
VO Default output voltage IIN = 0 µA 0.93 1 1.07 V
ΔVO/ΔTA Output voltage drift ±20 µV/°C
INPUT PERFORMANCE
RIN Input Resistance 50 100 150 Ω
VIN Default input bias voltage Input pin floating 2.44 2.5 2.55 V
ΔVIN/ΔTA Default input bias voltage drift Input pin floating 1.1 mV/°C
IIN DC input current range Z21 < 3-dB degradation from
IIN = 5 µA		 27 34 µA
OUTPUT PERFORMANCE
VOH Output voltage swing (high) (5) 2.05 2.3 V
TA = –40°C to 125°C 2.3 V
VOL Output voltage swing (low) (6) 0.4 0.6 V
TA = –40°C to 125°C 0.45 V
IOUT Linear output drive (source) IIN = 15 µA, RL = 25 Ω 16 19 22 mA
TA = –40°C, IIN = 15 µA, RL = 25 Ω 19
TA = 125°C, IIN = 15 µA, RL = 25 Ω 19
ISC Output short-circuit current (7) 85 mA
ZOUT DC output impedance (amplifier enabled) 7 10 13 Ω
AMBIENT LIGHT CANCELLATION PERFORMANCE (IDC_EN = 0 V) (8)
Settling time IIN = 0 µA → 100 µA 6 µs
IIN = 100 µA → 0 µA 35 µs
Ambient light current cancellation range Output offset shift from IDC = 5 µA < ±10 mV 2 3 mA
POWER SUPPLY
IQ Quiescent current 16 20 24 mA
TA = 125°C 22.5
TA = –40°C 18
SHUTDOWN
IQ Disabled quiescent current (EN = VDD) 1.2 1.5 1.7 mA
TA = –40°C 1.4
TA = 125°C 1.6
EN and IDC_EN pins input bias current 65 90 µA
(1) Input capacitance of photodiode.
(2) Average of rising and falling slew rate.
(3) Pulse duration extension measured at 50% of pulse height of square wave.
(4) Gain measured at the amplifier output pin when driving a 100-Ω resistive load. At higher resistor loads the gain increases.
(5) Photodiode anode biased to a negative voltage
(6) Photodiode cathode biased to a positive voltage
(7) Device cannot withstand continuous short-circuit.
(8) Enabling the ambient light cancellation loop adds noise to the system.