SBOS849B December   2017  – February 2019 LMH5401-SP

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      LMH5401-SP Small Signal Frequency Response
      2.      LMH5401-SP Driving an ADC12D1620QML
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics: VS = 5 V
    6. 7.6 Electrical Characteristics: VS = 3.3 V
    7. 7.7 Typical Characteristics: 5 V
    8. 7.8 Typical Characteristics: 3.3 V
  8. 8 Parameter Measurement Information
    1. 8.1  Output Reference Nodes and Gain Nomenclature
    2. 8.2  ATE Testing and DC Measurements
    3. 8.3  Frequency Response
    4. 8.4  S-Parameters
    5. 8.5  Frequency Response with Capacitive Load
    6. 8.6  Distortion
    7. 8.7  Noise Figure
    8. 8.8  Pulse Response, Slew Rate, and Overdrive Recovery
    9. 8.9  Power Down
    10. 8.10 VCM Frequency Response
    11. 8.11 Test Schematics
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Fully-Differential Amplifier
      2. 9.3.2 Operations for Single-Ended to Differential Signals
        1. 9.3.2.1 AC-Coupled Signal Path Considerations for Single-Ended Input to Differential Output Conversion
        2. 9.3.2.2 DC-Coupled Input Signal Path Considerations for SE-DE Conversions
        3. 9.3.2.3 Resistor Design Equations for Single-to-Differential Applications
        4. 9.3.2.4 Input Impedance Calculations
      3. 9.3.3 Differential-to-Differential Signals
        1. 9.3.3.1 AC-Coupled, Differential-Input to Differential-Output Design Issues
        2. 9.3.3.2 DC-Coupled, Differential-Input to Differential-Output Design Issues
      4. 9.3.4 Output Common-Mode Voltage
    4. 9.4 Device Functional Modes
      1. 9.4.1 Operation With a Split Supply
      2. 9.4.2 Operation With a Single Supply
  10. 10Application and Implementation
    1. 10.1 Application Information
      1. 10.1.1 Stability, Noise Gain, and Signal Gain
      2. 10.1.2 Input and Output Headroom Considerations
      3. 10.1.3 Noise Analysis
      4. 10.1.4 Noise Figure
      5. 10.1.5 Thermal Considerations
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Driving Matched Loads
        2. 10.2.2.2 Driving Unmatched Loads For Lower Loss
        3. 10.2.2.3 Driving Capacitive Loads
        4. 10.2.2.4 Driving ADCs
          1. 10.2.2.4.1 SNR Considerations
          2. 10.2.2.4.2 SFDR Considerations
          3. 10.2.2.4.3 ADC Input Common-Mode Voltage Considerations—AC-Coupled Input
          4. 10.2.2.4.4 ADC Input Common-Mode Voltage Considerations—DC-Coupled Input
        5. 10.2.2.5 GSPS ADC Driver
        6. 10.2.2.6 Common-Mode Voltage Correction
        7. 10.2.2.7 Active Balun
      3. 10.2.3 Application Curves
    3. 10.3 Do's and Don'ts
      1. 10.3.1 Do:
      2. 10.3.2 Don't:
  11. 11Power Supply Recommendations
    1. 11.1 Supply Voltage
    2. 11.2 Single Supply
    3. 11.3 Split Supply
    4. 11.4 Supply Decoupling
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Device Support
      1. 13.1.1 Device Nomenclature
    2. 13.2 Documentation Support
      1. 13.2.1 Related Documentation
    3. 13.3 Receiving Notification of Documentation Updates
    4. 13.4 Community Resources
    5. 13.5 Trademarks
    6. 13.6 Electrostatic Discharge Caution
    7. 13.7 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

10.2.2.4.1 SNR Considerations

The signal-to-noise ratio (SNR) of the amplifier and filter can be calculated from the amplitude of the signal and the bandwidth of the filter. The noise from the amplifier is band-limited by the filter with the equivalent brick-wall filter bandwidth. The amplifier and filter noise can be calculated using Equation 12:

Equation 12. LMH5401-SP q_snr_amp_bos710.gif

where

  • eFILTEROUT = eNAMPOUT × √ENB,
  • eNAMPOUT = the output noise density of the LMH5401-SP,
  • ENB = the brick-wall equivalent noise bandwidth of the filter, and
  • VO = the amplifier output signal.

For example, with a first-order (N = 1) band-pass or low-pass filter with a 30-MHz cutoff, the ENB is 1.57 × f–3dB = 1.57 × 30 MHz = 47.1 MHz. For second-order (N = 2) filters, the ENB is 1.22 × f–3dB. When filter order increases, the ENB approaches f–3dB (N = 3 → ENB = 1.15 × f–3dB; N = 4 → ENB = 1.13 × f–3dB). Both VO and eFILTEROUT are in RMS voltages. For example, with a 2-VPP (0.707 VRMS) output signal and a 30-MHz first-order filter, the SNR of the amplifier and filter is 70.7 dB with eFILTEROUT = 5.81 nV/√Hz × √47.1 MHz = 39.9 μVRMS.

The SNR of the amplifier, filter, and ADC sum in RMS fashion is as shown in Equation 13 (SNR values in dB):

Equation 13. LMH5401-SP q_snr_sys_bos710.gif

This formula shows that if the SNR of the amplifier and filter equals the SNR of the ADC, the combined SNR is 3 dB lower (worse). Thus, for minimal degradation (< 1 dB) on the ADC SNR, the SNR of the amplifier and filter must be ≥ 10 dB greater than the ADC SNR. The combined SNR calculated in this manner is usually accurate to within ±1 dB of the actual implementation.