Similar to all high-speed devices, best system performance is achieved with a close attention to board layout. The LMH5485-SEP evaluation module (EVM) shows a good example of high frequency layout techniques as a reference. This EVM includes numerous extra elements and features for characterization purposes that may not apply to some applications. General high-speed, signal-path layout suggestions include the following:

• Continuous ground planes are preferred for signal routing with matched impedance traces for longer runs; however, ground and power planes around the capacitive sensitive input and output device pins should be open. After the signal is sent into a resistor, the parasitic capacitance becomes more of a band limiting issue and less of a stability issue.
• Use good, high-frequency decoupling capacitors (0.1 µF) on the ground plane at the device power pins. Higher value capacitors (2.2 µF) are required, but may be placed further from the device power pins and shared among devices. A supply decoupling capacitor across the two power supplies (for bipolar operation) should also be added. For best high-frequency decoupling, consider X2Y supply-decoupling capacitors that offer a much higher self-resonance frequency over standard capacitors.
• For each LMH5485-SEP, attach a separate 0.1 µF capacitor to a nearby ground plane. With cascaded or multiple parallel channels, including ferrite beads from the larger capacitor is often useful to the local high-frequency decoupling capacitor.
• When using differential signal routing over any appreciable distance, use microstrip layout techniques with matched impedance traces.
• The input summing junctions are very sensitive to parasitic capacitance. Connect any Rg elements into the summing junction with minimal trace length to the device pin side of the resistor. The other side of the Rg elements can have more trace length if needed to the source or to ground.