SNOSAL8D April   2006  – September 2021 LMH6321

PRODUCTION DATA  

  1. 1Features
  2. 2Applications
  3. 3Description
  4. 4Revision History
  5. 5Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 Operating Ratings
    3. 5.3 Thermal Information
    4. 5.4 ±15 V Electrical Characteristics
    5. 5.5 ±5 V Electrical Characteristics
    6. 5.6 Typical Characteristics
  6. 6Application Hints
    1. 6.1  Buffers
    2. 6.2  Supply Bypassing
    3. 6.3  Load Impedence
    4. 6.4  Source Inductance
    5. 6.5  Overvoltage Protection
    6. 6.6  Bandwidth and Stability
    7. 6.7  Output Current and Short Circuit Protection
    8. 6.8  Thermal Management
      1. 6.8.1 Heatsinking
      2. 6.8.2 Determining Copper Area
      3. 6.8.3 Procedure
      4. 6.8.4 Example
    9. 6.9  Error Flag Operation
    10. 6.10 Single Supply Operation
    11. 6.11 Slew Rate
  7. 7Device and Documentation Support
    1. 7.1 Receiving Notification of Documentation Updates
    2. 7.2 Support Resources
    3. 7.3 Trademarks
    4. 7.4 Electrostatic Discharge Caution
    5. 7.5 Glossary
  8. 8Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • KTW|7
  • DDA|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.11 Slew Rate

Slew rate is the rate of change of output voltage for large-signal step input changes. For resistive load, slew rate is limited by internal circuit capacitance and operating current (in general, the higher the operating current for a given internal capacitance, the faster is the slew rate). Figure 6-7 shows the slew capabilities of the LMH6321 under large signal input conditions, using a resistive load.

GUID-AAC9C7A6-0657-425B-AFE1-B111A0761A69-low.gifFigure 6-7 Slew Rate vs. Peak-to-Peak Input Voltage

However, when driving capacitive loads, the slew rate may be limited by the available peak output current according to the following expression.

Equation 10. dv/dt = IPK/CL

and rapidly changing output voltages will require large output load currents. For example if the part is required to slew at 1000 V/μs with a load capacitance of 1 nF the current demand from the LMH6321 would be 1A. Therefore, fast slew rate is incompatible with large CL. Also, since CL is in parallel with the load, the peak current available to the load decreases as CL increases.

Figure 6-8 illustrates the effect of the load capacitance on slew rate. Slew rate tests are specified for resistive loads and/or very small capacitive loads, otherwise the slew rate test would be a measure of the available output current. For the highest slew rate, it is obvious that stray load capacitance should be minimized. Peak output current should be kept below 500 mA. This translates to a maximum stray capacitance of 500 pF for a slew rate of 1000 V/μs.

GUID-8113DB50-B78D-4F38-A801-85C5A83D3CF0-low.gifFigure 6-8 Slew Rate vs. Load Capacitance