SNOS986E
December 2001 – July 2014
LMH6622
PRODUCTION DATA.
1
Features
2
Applications
3
Description
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
Handling Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
±6 V Electrical Characteristics
6.6
±2.5 V Electrical Characteristics
6.7
Typical Performance Characteristics
7
Parameter Measurement Information
7.1
Test Circuits
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.4
Device Functional Modes
9
Application and Implementation
9.1
DSL Receive Channel Applications
9.2
Receive Channel Noise Calculation
9.3
Differential Analog-to-Digital Driver
9.4
Typical Application
9.4.1
Design Requirements
9.4.2
Detailed Design Procedure
9.4.3
Application Curves
10
Power Supply Recommendations
10.1
Driving Capacitive Load
11
Layout
11.1
Layout Guidelines
11.1.1
Circuit Layout Considerations
11.2
Layout Examples
11.2.1
SOIC Layout Example
11.2.2
VSSOP Layout Example
12
Device and Documentation Support
12.1
Trademarks
12.2
Electrostatic Discharge Caution
12.3
Glossary
13
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
D|8
MSOI002K
DGK|8
MPDS028E
Thermal pad, mechanical data (Package|Pins)
Orderable Information
snos986e_oa
snos986e_pm
7 Parameter Measurement Information
7.1 Test Circuits
Figure 29. Non-Inverting Amplifier
Figure 30. CMRR
Figure 31. Voltage Noise
R
G
= 1 Ω for f ≤ 100 kHz, R
G
= 20 Ω for f > 100 kHz
Figure 32. Current Noise
R
G
= 1 Ω for f ≤ 100 kHz, R
G
= 20 Ω for f > 100 kHz
Figure 33. Multitone Power Ratio, R
F
= 500 Ω, R
G
= 174 Ω, R
L
= 437 Ω