SNAS579G March 2012 – December 2014 LMK00105
PRODUCTION DATA.
Refer to the PDF data sheet for device specific package drawings
Separate core and output supplies allow the output buffers to operate at the same supply as the Vdd core supply (3.3 V or 2.5 V) or from a lower supply voltage (3.3 V, 2.5 V, 1.8 V, or 1.5 V). Compared to single-supply operation, dual supply operation enables lower power consumption and output-level compatibility.
Bank A (CLKout0 and CLKout1) and Bank B (CLKout2 to CLKout4) may also be operated at different Vddo voltages, provided neither Vddo voltage exceeds Vdd.
NOTE
Care should be taken to ensure the Vddo voltage does not exceed the Vdd voltage to prevent turning-on the internal ESD protection circuitry.
DO NOT DISCONNECT OR GROUND ANY OF THE Vddo PINS because the Vddo pins are internally connected within an output bank.