SNAS577G February   2012  – August 2018 LMK00304

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1.     Device Images
      1.      Functional Block Diagram
      2.      LVPECL Output Swing (VOD) vs. Frequency
  4. Revision History
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Parameter Measurement Information
    1. 7.1 Differential Voltage Measurement Terminology
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 VCC and VCCO Power Supplies
      2. 8.3.2 Clock Inputs
      3. 8.3.3 Clock Outputs
        1. 8.3.3.1 Reference Output
  9. Application and Implementation
    1. 9.1 Driving the Clock Inputs
    2. 9.2 Crystal Interface
    3. 9.3 Termination and Use of Clock Drivers
      1. 9.3.1 Termination for DC-Coupled Differential Operation
      2. 9.3.2 Termination for AC-Coupled Differential Operation
      3. 9.3.3 Termination for Single-Ended Operation
  10. 10Power Supply Recommendations
    1. 10.1 Power Supply Sequencing
    2. 10.2 Current Consumption and Power Dissipation Calculations
      1. 10.2.1 Power Dissipation Example: Worst-Case Dissipation
    3. 10.3 Power Supply Bypassing
      1. 10.3.1 Power Supply Ripple Rejection
    4. 10.4 Thermal Management
      1. 10.4.1 Support for PCB Temperature up to 105°C
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Reference Output

The reference output (REFout) provides a LVCMOS copy of the selected input clock. The LVCMOS output high level is referenced to the Vcco voltage. REFout can be enabled or disabled using the enable input pin, REFout_EN, as shown in Table 5.

Table 5. Reference Output Enable

REFout_EN REFout STATE
0 Disabled (Hi-Z)
1 Enabled

The REFout_EN input is internally synchronized with the selected input clock by the SYNC block. This synchronizing function prevents glitches and runt pulses from occurring on the REFout clock when enabled or disabled. REFout will be enabled within 3 cycles (tEN) of the input clock after REFout_EN is toggled high. REFout will be disabled within 3 cycles (tDIS) of the input clock after REFout_EN is toggled low.

When REFout is disabled, the use of a resistive loading can be used to set the output to a predetermined level. For example, if REFout is configured with a 1 kΩ load to ground, then the output will be pulled to low when disabled.