SNAS577G February   2012  – August 2018 LMK00304

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Functional Block Diagram
      2.      LVPECL Output Swing (VOD) vs. Frequency
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Parameter Measurement Information
    1. 7.1 Differential Voltage Measurement Terminology
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 VCC and VCCO Power Supplies
      2. 8.3.2 Clock Inputs
      3. 8.3.3 Clock Outputs
        1. 8.3.3.1 Reference Output
  9. 9 Application and Implementation
    1. 9.1 Driving the Clock Inputs
    2. 9.2 Crystal Interface
    3. 9.3 Termination and Use of Clock Drivers
      1. 9.3.1 Termination for DC-Coupled Differential Operation
      2. 9.3.2 Termination for AC-Coupled Differential Operation
      3. 9.3.3 Termination for Single-Ended Operation
  10. 10Power Supply Recommendations
    1. 10.1 Power Supply Sequencing
    2. 10.2 Current Consumption and Power Dissipation Calculations
      1. 10.2.1 Power Dissipation Example: Worst-Case Dissipation
    3. 10.3 Power Supply Bypassing
      1. 10.3.1 Power Supply Ripple Rejection
    4. 10.4 Thermal Management
      1. 10.4.1 Support for PCB Temperature up to 105°C
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

9.3.1 Termination for DC-Coupled Differential Operation

For DC-coupled operation of an LVDS driver, terminate with 100 Ω as close as possible to the LVDS receiver as shown in Figure 29.

LMK00304 30177320.gifFigure 29. Differential LVDS Operation, DC Coupling,
No Biasing by the Receiver

For DC-coupled operation of an HCSL driver, terminate with 50 Ω to ground near the driver output as shown in Figure 30. Series resistors, Rs, may be used to limit overshoot due to the fast transient current. Because HCSL drivers require a DC path to ground, AC coupling is not allowed between the output drivers and the 50-Ω termination resistors.

LMK00304 30177390.gifFigure 30. HCSL Operation, DC Coupling

For DC-coupled operation of an LVPECL driver, terminate with 50 Ω to Vcco - 2 V as shown in Figure 31. Alternatively terminate with a Thevenin equivalent circuit as shown in Figure 32 for Vcco (output driver supply voltage) = 3.3 V and 2.5 V. In the Thevenin equivalent circuit, the resistor dividers set the output termination voltage (VTT) to Vcco – 2 V.

LMK00304 30177321.gifFigure 31. Differential LVPECL Operation, DC Coupling
LMK00304 30177322.gifFigure 32. Differential LVPECL Operation, DC Coupling, Thevenin Equivalent