SNAS771A December 2018 – December 2018 LMK05318
PRODUCTION DATA.
Refer to the PDF data sheet for device specific package drawings
When APLL auto-mute is enabled, the outputs will start up in synchronous fashion without clock glitches once APLL lock is achieved after any the following events: device power-on, exiting hard-reset, exiting soft-reset, or deasserting output SYNC (when SYNC_MUTE = 1).