SNAS771A December 2018 – December 2018 LMK05318
PRODUCTION DATA.
Refer to the PDF data sheet for device specific package drawings
When started in I2C mode (HW_SW_CTRL = 0 or 1), the LMK05318 operates as an I2C slave and supports bus rates of 100 kHz (standard mode) and 400 kHz (fast mode). Slower bus rates can work as long as the other I2C specifications are met.
In EEPROM mode, the LMK05318 can support up to four different I2C addresses depending on the GPIO1 pins. The 7-bit I2C address is 11001xxb, where the two LSBs are determined by the GPIO1 input levels sampled at device POR and the five MSBs (11001b) are initialized from the EEPROM. In ROM mode, the two LSBs are fixed to 00b, while the five MSB (11001b) are initialized from the EEPROM.