SNAS771A December 2018 – December 2018 LMK05318
PRODUCTION DATA.
Refer to the PDF data sheet for device specific package drawings
Each of the six output channels has as output mux. Each output mux for the OUT0 to OUT7 channels can individually select between the PLL1 VCO clocks (normal or inverted) and PLL2 VCO post-divider clocks.