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DATA SHEET
LMK1C110x 1.8-V, 2.5-V, and 3.3-V LVCMOS Clock Buffer Family
1 Features
- High-performance 1:2, 1:3 or 1:4 LVCMOS clock
buffer
- Very low output skew < 50 ps
- Extremely low additive jitter < 50 fs maximum
- 7.5 fs typical at
VDD = 3.3 V
- 10 fs typical at
VDD = 2.5 V
- 19.2 fs typical at
VDD = 1.8 V
- Very low propagation delay < 3 ns
- Synchronous output enable
- Supply voltage: 3.3 V, 2.5 V, or 1.8 V
- 3.3-V tolerant input at
all supply voltages
- Fail-safe inputs
- fmax = 250 MHz for 3.3 V
fmax = 200 MHz for 2.5 V and 1.8
V - Operating temperature range: –40°C to 125°C
- Available in 8-pin TSSOP package
- Available in 8-pin WSON package