SNAS832A october   2021  – june 2023 LMK1D1208P

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Device Comparison
  7. 6 Pin Configuration and Functions
  8. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  9. 8 Parameter Measurement Information
  10. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Fail-Safe Input
    4. 9.4 Device Functional Modes
      1. 9.4.1 LVDS Output Termination
      2. 9.4.2 Input Termination
  11. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curves
    3. 10.3 Power Supply Recommendations
    4. 10.4 Layout
      1. 10.4.1 Layout Guidelines
      2. 10.4.2 Layout Examples
  12. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Support Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  13. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

9.4 Device Functional Modes

The two inputs of the LMK1D1208P are internally muxed together and can be selected through the control pin (see Table 9-2). Unused inputs can be left floating to reduce overall component cost. Both AC- and DC-coupling schemes can be used with the LMK1D1208P to provide greater system flexibility.

Table 9-2 Input Selection Table
IN_SELACTIVE CLOCK INPUT
0IN0_P, IN0_N
1IN1_P, IN1_N
OpenNone (1)
(1) The input buffers are disabled and the state of the outputs are dependent on the state of OEx (see Table 9-3). If OEx = 0, the corresponding output will be disabled in Hi-Z state, whereas if OEx = 1 (default), the corresponding output will be logic low.

The outputs of the LMK1D1208P can be individually enabled or disabled using the OEx hardware pins (see Table 9-3). The disabled state of the outputs is Hi-Z (high impedance) as this reduces the power consumption and also prevents back-biasing of the devices connected to these outputs.

Unused outputs should be disabled to eliminate the need for a termination resistor. In the case of enabled unused outputs, TI recommends a 100-Ω termination for optimal performance.

Table 9-3 Output Control
OExCLOCK OUTPUTS
0OUTPx, OUTNx disabled in Hi-Z state
1 (default)OUTPx, OUTNx enabled

The output amplitude of the banks of the LMK1D1208P can be selected through the amplitude selection pin (see Table 9-4). The higher output amplitude mode (boosted LVDS swing mode) can be used in applications which require higher amplitude either for better noise performance (higher slew rate) or if the receiver has swing requirements which the standard LVDS swing cannot meet.

Table 9-4 Amplitude Selection
AMP_SELOUTPUT AMPLITUDE (mV)
0Bank 0: boosted LVDS swing (500 mV)
Bank 1: standard LVDS swing (350 mV)
OPENBank 0: standard LVDS swing (350 mV)
Bank 1: standard LVDS swing (350 mV)
1Bank 0: boosted LVDS swing (500 mV)
Bank 1: boosted LVDS swing (500 mV)