SNAS888A September   2024  – November 2024 LMK1D2102L , LMK1D2106L

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. 7 Parameter Measurement Information
    1. 7.1 Differential Voltage Measurement Terminology
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Output Common Mode
      2. 8.3.2 Fail-Safe Input
    4. 8.4 Device Functional Modes
      1. 8.4.1 Output Enable / Disable and Amplitude Selection
      2. 8.4.2 LVDS Output Termination
      3. 8.4.3 Input Termination
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Examples
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information
    1. 12.1 Tape and Reel Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • RHA|40
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.6 Typical Characteristics

LMK1D210xL buffer typical characteristics are shown for current consumption, phase noise performance and timing diagrams and output common mode operation.

Note that these graphs serve as a guidance to the users on what to expect for the range of operating frequency supported by the LMK1D210xL. These graphs are plotted for a limited number of frequencies and load conditions, which do not represent the customer system.

LMK1D2102L LMK1D2104L LMK1D2106L LMK1D2108L LMK1D2102L Current Consumption vs. Frequency, AMP_SELA = 0Figure 6-1 LMK1D2102L Current Consumption vs. Frequency, AMP_SELA = 0

LMK1D2102L LMK1D2104L LMK1D2106L LMK1D2108L LMK1D2104L Current Consumption vs. Frequency, AMP_SELA = 0

Figure 6-3 LMK1D2104L Current Consumption vs. Frequency, AMP_SELA = 0
LMK1D2102L LMK1D2104L LMK1D2106L LMK1D2108L LMK1D2106L Current Consumption vs. Frequency, AMP_SELA and AMP_SELB = 0Figure 6-5 LMK1D2106L Current Consumption vs. Frequency, AMP_SELA and AMP_SELB = 0
LMK1D2102L LMK1D2104L LMK1D2106L LMK1D2108L LMK1D2108L Current Consumption vs. Frequency, AMP_SELA and AMP_SELB = 0Figure 6-7 LMK1D2108L Current Consumption vs. Frequency, AMP_SELA and AMP_SELB = 0
LMK1D2102L LMK1D2104L LMK1D2106L LMK1D2108L LMK1D210xL VOD vs. Frequency, AMP_SELA / AMP_SELB = 0Figure 6-9 LMK1D210xL VOD vs. Frequency, AMP_SELA / AMP_SELB = 0
LMK1D2102L LMK1D2104L LMK1D2106L LMK1D2108L LMK1D210xL DC Output Common Mode at 1.8V Supply Condition, Differential Low (AMP_SELA / AMP_SELB = 0)Figure 6-11 LMK1D210xL DC Output Common Mode at 1.8V Supply Condition, Differential Low (AMP_SELA / AMP_SELB = 0)
LMK1D2102L LMK1D2104L LMK1D2106L LMK1D2108L LMK1D210xL DC Output Common Mode at 2.5V/3.3V Supply Condition, Differential Low (AMP_SELA / AMP_SELB = 0)Figure 6-13 LMK1D210xL DC Output Common Mode at 2.5V/3.3V Supply Condition, Differential Low (AMP_SELA / AMP_SELB = 0)
LMK1D2102L LMK1D2104L LMK1D2106L LMK1D2108L Input Source at 156.25MHz (12kHz - 20MHz) Figure 6-15 Input Source at 156.25MHz (12kHz - 20MHz)
LMK1D2102L LMK1D2104L LMK1D2106L LMK1D2108L Input Source at 625MHz (12kHz - 20MHz)Figure 6-17 Input Source at 625MHz (12kHz - 20MHz)
LMK1D2102L LMK1D2104L LMK1D2106L LMK1D2108L Input Source at 1250MHz (12kHz - 20MHz)Figure 6-19 Input Source at 1250MHz (12kHz - 20MHz)
LMK1D2102L LMK1D2104L LMK1D2106L LMK1D2108L LMK1D2102L Current Consumption vs. Frequency, AMP_SELA = Floating Figure 6-2 LMK1D2102L Current Consumption vs. Frequency, AMP_SELA = Floating
LMK1D2102L LMK1D2104L LMK1D2106L LMK1D2108L LMK1D2104L Current Consumption vs. Frequency, AMP_SELA = Floating Figure 6-4 LMK1D2104L Current Consumption vs. Frequency, AMP_SELA = Floating
LMK1D2102L LMK1D2104L LMK1D2106L LMK1D2108L LMK1D2106L Current Consumption vs. Frequency, AMP_SELA and AMP_SELB = FloatingFigure 6-6 LMK1D2106L Current Consumption vs. Frequency, AMP_SELA and AMP_SELB = Floating
LMK1D2102L LMK1D2104L LMK1D2106L LMK1D2108L LMK1D2108L Current Consumption vs. Frequency, AMP_SELA and AMP_SELB = FloatingFigure 6-8 LMK1D2108L Current Consumption vs. Frequency, AMP_SELA and AMP_SELB = Floating
LMK1D2102L LMK1D2104L LMK1D2106L LMK1D2108L LMK1D210xL VOD vs. Frequency, AMP_SELA / AMP_SELB = FloatingFigure 6-10 LMK1D210xL VOD vs. Frequency, AMP_SELA / AMP_SELB = Floating
LMK1D2102L LMK1D2104L LMK1D2106L LMK1D2108L LMK1D210xL DC Output Common Mode at 1.8V Supply Condition, Differential Low (AMP_SELA / AMP_SELB = Float)Figure 6-12 LMK1D210xL DC Output Common Mode at 1.8V Supply Condition, Differential Low (AMP_SELA / AMP_SELB = Float)
LMK1D2102L LMK1D2104L LMK1D2106L LMK1D2108L LMK1D210xL DC Output Common Mode at 2.5V/3.3V Supply Condition, Differential Low (AMP_SELA / AMP_SELB = Float) Figure 6-14 LMK1D210xL DC Output Common Mode at 2.5V/3.3V Supply Condition, Differential Low (AMP_SELA / AMP_SELB = Float)
LMK1D2102L LMK1D2104L LMK1D2106L LMK1D2108L LMK1D210xL Phase Noise / Output Jitter at 156.25MHz (12kHz - 20MHz), Input Slew Rate = 1.5V/ns
See Note 1 and 2 in Graph Notes table
Figure 6-16 LMK1D210xL Phase Noise / Output Jitter at 156.25MHz (12kHz - 20MHz), Input Slew Rate = 1.5V/ns
LMK1D2102L LMK1D2104L LMK1D2106L LMK1D2108L LMK1D210XL Phase Noise / Output Jitter at 625MHz (12kHz - 20MHz), Input Slew Rate >3V/ns
See Note 1 and 3 in Graph Notes table
Figure 6-18 LMK1D210XL Phase Noise / Output Jitter at 625MHz (12kHz - 20MHz), Input Slew Rate >3V/ns
LMK1D2102L LMK1D2104L LMK1D2106L LMK1D2108L LMK1D210XL Phase Noise / Output Jitter at 1250MHz (12kHz-20MHz), Input Slew Rate > 3V/ns
See Note 1 and 4 in Graph Notes table
Figure 6-20 LMK1D210XL Phase Noise / Output Jitter at 1250MHz (12kHz-20MHz), Input Slew Rate > 3V/ns
Table 6-1 Graph Notes
NOTE
(1) The typical RMS jitter values in the plots show the total output RMS jitter (JOUT) for each frequency and the source clock RMS jitter (JSOURCE). From these values, the Additive RMS Jitter can be calculated as: JADD = SQRT(JOUT2 – JSOURCE2).
(2) JADD at 156.25MHz = SQRT(46.9322- 25.0572) = 39.68fs.
(3) JADD at 625MHz = SQRT(23.4382- 8.4332) = 21.87fs.
(4) JADD at 1250MHz = SQRT(17.8592- 6.7762) = 16.52fs.