SNAS750B November 2020 – March 2021 LMK5C33216
PRODUCTION DATA
The DPLL feedback path has a programmable prescaler (33 bits, 1 to 233-1) and a fractional feedback (FB) divider. The programmable DPLL FB divider includes a 33-b integer portion (INT), 40-b numerator portion (NUM), and 40-b denominator portion (DEN). The total DPLL FB divider value is: FBDPLL = INT + NUM / DEN.
In DPLL mode, the TDC frequency and total DPLL feedback divider and prescalers determine the VCO frequency, which can be computed by Equation 5.