SNAS750B November 2020 – March 2021 LMK5C33216
PRODUCTION DATA
The LMK5C33216 supports a SPI block write and block read transfers. A SPI block transfer is exactly (2 + N) bytes long, where N is the number of data bytes to write or read. The host device (SPI host) is only required to specify the lowest address of the sequence of addresses to be accessed. The device will automatically increment the internal register address pointer if the SCS pin remains low after the host finishes the initial 24-bit transmission sequence. Each transfer of eight bits (a data payload width) results in the device automatically incrementing the address pointer (provided the SCS pin remains active low for all sequences).