SNAS848 December 2023 LMK5C33216A
PRODUCTION DATA
The output clock distribution blocks include six output muxes, eleven output dividers, and 16 programmable differential output drivers in the LMK5C33216A. The output dividers support output synchronization (SYNC) to allow phase synchronization between two or more output channels. Also, the channels OUT0, OUT4, or OUT10 have an optional internal ZDM synchronization feature to support deterministic input-to-output phase alignment (typically for 1-PPS clocks) with programmable offset.