SNOSAW6E January   2008  – December 2014 LMP7721

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics: 2.5 V
    6. 6.6 Electrical Characteristics: 5 V
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Ultra-Low Input Bias Current
      2. 7.3.2 Wide Bandwidth at Low-Supply Current
      3. 7.3.3 Low Input Referred Noise
      4. 7.3.4 Low-Supply Voltage
      5. 7.3.5 Rail-to-Rail Output and Ground Sensing
      6. 7.3.6 Unique Pinout
      7. 7.3.7 Input Protection
    4. 7.4 Device Functional Modes
      1. 7.4.1 Compensating Input Capacitance
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Using a Guard
      2. 8.1.2 Use Triaxial Cable
      3. 8.1.3 Properly Clean the Assembly
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

11 Device and Documentation Support

11.1 Device Support

11.1.1 Development Support

11.2 Documentation Support

11.2.1 Related Documentation

For related documentation, see the following:

  • LMP7721 Multi-Function Evaluation Board (current evaluation board), SNOU004
  • AN-1796 LMP7721 Evaluation Board (obsolete evaluation board - for reference only), SNOA513
  • AN-1798 Designing with Electro-Chemical Sensors, SNOA514
  • AN-1803 Design Considerations for a Transimpedance Amplifier, SNOA515
  • AN-1852 Designing With pH Electrodes, SNOA529
  • Compensate Transimpedance Amplifiers Intuitively, SBOA055
  • Transimpedance Considerations for High-Speed Operational Amplifiers, SBOA112
  • Noise Analysis of FET Transimpedance Amplifiers, SBOA060
  • Circuit Board Layout Techniques - SLOA089
  • Handbook of Operational Amplifier Applications - SBOA092
  • Low Level Measurements Handbook, Keithley Instruments, Inc., Latest Edition. Available: www.keithley.com
  • Grohe, P., "Design femtoampere circuits with low leakage, Part 1", EDN Magazine, November 7, 2011. Available: www.edn.com
  • Grohe, P., "Design femtoampere circuits with low leakage, Part 2", EDN Magazine, June 15, 2012. Available: www.edn.com
  • Grohe, P., "Design femtoampere circuits with low leakage, Part 3", EDN Magazine, September 7, 2012. Available: www.edn.com

11.3 Trademarks

LMP, PowerWise are trademarks of TI.

All other trademarks are the property of their respective owners.

11.4 Electrostatic Discharge Caution

esds-image

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.

11.5 Glossary

SLYZ022 — TI Glossary.

This glossary lists and explains terms, acronyms, and definitions.