SNVSAL6A July   2016  – February 2017 LMP8480-Q1 , LMP8481-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
      1. 8.1.1 Theory of Operation
    2. 8.2 Functional Block Diagrams
    3. 8.3 Feature Description
      1. 8.3.1  Basic Connections
      2. 8.3.2  Selection of the Sense Resistor
      3. 8.3.3  Using PCB Traces as Sense Resistors
      4. 8.3.4  VREFA and VREFB Pins (LMP8481-Q1 Only)
        1. 8.3.4.1 One-to-One (1:1) Reference Input
        2. 8.3.4.2 Setting Output to One-Half VCC or external VREF
      5. 8.3.5  Reference Input Voltage Limits (LMP8481-Q1 Only)
      6. 8.3.6  Low-Side Current Sensing
      7. 8.3.7  Input Series Resistance
      8. 8.3.8  Minimum Output Voltage
      9. 8.3.9  Swinging Output Below Ground
      10. 8.3.10 Maximum Output Voltage
    4. 8.4 Device Functional Modes
      1. 8.4.1 Unidirectional vs Bidirectional Operation
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Input Common-Mode and Differential Voltage Range
    2. 9.2 Typical Applications
      1. 9.2.1 Unidirectional Application With the LMP8480-Q1
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curve
      2. 9.2.2 Bidirectional Current Sensing Using the LMP8481-Q1
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
        3. 9.2.2.3 Application Curve
      3. 9.2.3 Typical Application With a Resistive Divider
  10. 10Power Supply Recommendations
    1. 10.1 Power Supply Decoupling
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Development Support
    2. 12.2 Related Links
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Community Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Pin Configuration and Functions

DGK Package, LMP8480-Q1
8-Pin VSSOP
Top View
LMP8480-Q1 LMP8481-Q1 LMP8480_pin_snvsal6.gif
DGK Package, LMP8481-Q1
8-Pin VSSOP
Top View
LMP8480-Q1 LMP8481-Q1 LMP8481_pin_snvsal6.gif

Pin Functions

PIN I/O DESCRIPTION
NAME NO.
LMP8480-Q1 LMP8481-Q1
GND 4 4 P Ground
NC 3, 6, 7 3 — No connection, not internally connected
REFA — 7 I Reference voltage A input
REFB — 6 I Reference voltage B input
RSN 8 8 I Negative current-sense input
RSP 1 1 I Positive current-sense input
VCC 2 2 P Positive supply voltage
VOUT 5 5 O Output